International Business Machines Corporation

Intel Corporation

Globalfoundries Inc.

Kyndryl, Inc.

Robert William Wisniewski

Valentina Salapura

Clifford A Pickover

John Joseph Stecher

Orran Yaakov Krieger

Robert Brett Tremaine

William Thomas Newport

Xiaowei Shen

Balaram Sinharoy

Bryan Savoye Rosenburg

Rick A Hamilton, Ii

James R Kozloski

Alan G Gara

Steven Joseph Branda

Amith R Mamidala

Hubertus Franke

Philip Heidelberger

Burkhard Steinmacher-Burow

Sameer Kumar

Todd Alan Inglett

Dong Chen

John Peter Karidis

Joseph D Ratterman

Martin Ohmacht

Marc Alan Auslander

Gabor J Dozsa

Michael K Gschwind

Christopher J Dawson

Paul William Coteus

Michael A Blocksome

Adam James Muff

Todd Edward Takken

Bruce Martin Fleischer

Alexandre E Eichenberger

Thomas M Gooding

John A Gunnels

Mark Edwin Giampapa

Neal Martin Keller

Kathryn Mary O'Brien

Mark Gregory Megerian

Sameh W Asaad

Matthias Augustin Blumrich

Shawn Anthony Hall

Thomas Winters Fox

John Kevin O'Brien

Chen-Yong Cher

Barry Marshall Trager

David Francis Bacon

Peng Wu

Evelyn Duesterwald

Yoonho Park

Charles David Wait

Peter Francis Sweeney

James Anthony Marcella

George L Chiu

Krishnan Sugavanam

Gerard Vincent Kopcsay

Jeffrey John Parker

Robert Matthew Senger

Noel A Eisley

Rudolf Adriaan Haring

Craig Brian Stunkel

David L Satterfield

Gheorghe Calin Cascaval

Douglas R Miller

Yutaka Sugawara

Kristan D Davis

Jose R Brunheroto

Dilma Menezes Da Silva

Michael B Mundy

Matthew Roger Ellavsky

Robert E Walkup

James Lee Van Oosten

Samuel J Miller

Ruth Janine Poole

Brant L Knudson

Peter Boyle

Ralph E Bellofatto

Norman Christ

David Joel Edelsohn

Kahn C Evans

Jonathan Appavoo

William Maupin Stockdell

Surya V Duggirala

Matthew Ara Goshgarian

Bhushan Kamlakar Lokhande

Alfred Thomas Watson, Iii

Rajesh Poornachandran

Brian E Smith

Vittorio R Castelli

Pratap Chandra Pattnaik

Juhnyoung Lee

Peter H Hochschild

Jarir Kamel Chaar

David R Safford

Keith D Underwood

Hartmut Penner

James Dinan

Eric Nels Herness

Tracy Jay Kimbrel

Methods, apparatus, systems, and articles of manufacture are disclosed to relocate a compute thread, the apparatus comprising control circuitry to maintain a location of a plurality of domain access counters associated with a plurality of compute-memory domains for a first compute thread, and an execution monitor to set a first domain access counter of the plurality of domain access counters, the first domain access counter associated with a first compute-memory domain of the compute-memory domains, and relocate the first compute thread to a second compute-memory domain of the compute-memory domains in response to a comparison between a second domain access counter associated with the second compute-memory domain and the first domain access counter.

Methods and apparatus for task relocation based on memory access patterns

A system and method for energy conservation in a virtual universe, the method comprising: determining, at a server, available energy conservation options associated with an avatar of the virtual universe; determining, at the server, selected energy conservation options of the available energy conservation options; and applying, at the server, the selected energy conservation options to portions of the virtual universe associated with the avatar.

Introducing selective energy efficiency in a virtual environment

A hierarchical barrier synchronization of cores and nodes on a multiprocessor system, in one aspect, may include providing by each of a plurality of threads on a chip, input bit signal to a respective bit in a register, in response to reaching a barrier; determining whether all of the plurality of threads reached the barrier by electrically tying bits of the register together and 'AND'ing the input bit signals; determining whether only on-chip synchronization is needed or whether inter-node synchronization is needed; in response to determining that all of the plurality of threads on the chip reached the barrier, notifying the plurality of threads on the chip, if it is determined that only on-chip synchronization is needed; and after all of the plurality of threads on the chip reached the barrier, communicating the synchronization signal to outside of the chip, if it is determined that inter-node synchronization is needed.

Method and apparatus for a hierarchical synchronization barrier in a multi-node system

A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaflop-scale includes node architectures based upon System-On-a-Chip technology, where each processing node comprises a single Application Specific Integrated Circuit (ASIC). The ASIC nodes are interconnected by a five dimensional torus network that optimally maximize the throughput of packet communications between nodes and minimize latency. The network implements collective network and a global asynchronous network that provides global barrier and notification functions. Integrated in the node design include a list-based prefetcher. The memory system implements transaction memory, thread level speculation, and multiversioning cache that improves soft error rate at the same time and supports DMA functionality allowing for parallel processing message-passing.

Multi-petascale highly efficient parallel supercomputer

A method of managing instant messaging communication over a computer network is provided. One or more instant messaging session windows are organized in an instant messaging session manager. At least one distinguishing session characteristic is attributed to each of the one or more instant messaging session windows. The at least one distinguishing session characteristic is at least one of a sound clip associated with a user of the session, an instant messaging session window background associated with a user of the session, and a change in at least one of a color and an intensity of the instant messaging session window. The at least one distinguishing session characteristic increases a likelihood of identification of each of the one or more instant messaging session windows.

Methods and apparatus for managing and distinguishing instant messaging sessions and threads

A method for managing virtual meetings includes initiating participation with a first user interface in a first meeting, initiating participation with the first user interface in a second meeting, determining whether attention of a user is directed towards the first meeting or the second meeting, and configuring the user interface such that the user interacts with meeting resources associated with the first meeting responsive to determining that the attention of the user is directed towards the first meeting.

Virtual meetings

A system for managing virtual meetings includes a processor operative to initiate participation with a first user interface in a first meeting, initiate participation with the first user interface in a second meeting, determining whether attention of a user is directed towards the first meeting or the second meeting, and configure the user interface such that the user interacts with meeting resources associated with the first meeting responsive to determining that the attention of the user is directed towards the first meeting.

A method comprising receiving control information at a first processing element from a second processing element, synchronizing objects within a shared global memory space of the first processing element with a shared global memory space of a second processing element in response to receiving the control information and generating a completion event indicating the first processing element has been synchronized with the second processing element.

Scalable synchronization mechanism for distributed memory

Useful work or services can be automated or otherwise facilitated or solutions to real world events developed by emulation of a real-world environment (which can contain objects representing virtual objects) with a virtual environment and generating a prioritized sequence of locations and associated tasks in accordance with resources related to the event in a virtual universe. Performance of the prioritized tasks at the prioritized locations is facilitated in the virtual universe by locally generating teleportation invitations corresponding to locations in the ordered sequence of locations.

Creation and prioritization of multiple virtual universe teleports in response to an event

A vehicle control system to control operation of a vehicle includes a powertrain system operable according to a plurality of operating modes that drive the vehicle. A sensor is mounted to the vehicle to detect a quality of air surrounding the vehicle. A vehicle control module is configured to select an operating mode of the powertrain system. The operating mode is selected to reduce at least one emission exhausted from the vehicle that contributes to a low air quality measure by the sensor.

Location-based vehicle powertrain regulation system

In some embodiments, a method comprises hosting a virtual universe in which one or more avatars interact with one or more virtual objects. The method can also include presenting energy conservation options that reduce amounts of power consumed in rendering the avatars and virtual objects in the virtual universe, detecting a selection of the energy conservation options, and configuring logic for rendering the avatars and virtual objects according to the selected energy conservation options. The method can also comprise rendering, according to the selection of energy conservation options, the avatars and virtual objects in the virtual universe.

A method and system for providing navigational support through corrective data includes monitoring a user's current position and travel pattern. A likelihood that the user is lost may be calculated based on the user's travel pattern and current position. If the likelihood exceeds a threshold value, the user may be provided with corrective data such as photographs or landmark information through visual or audio communication to assist the user in taking a corrective action or preventing getting lost.

Providing navigational support through corrective data

A Multi-Petascale Highly Efficient Parallel Supercomputer of 100 petaOPS-scale computing, at decreased cost, power and footprint, and that allows for a maximum packaging density of processing nodes from an interconnect point of view. The Supercomputer exploits technological advances in VLSI that enables a computing model where many processors can be integrated into a single Application Specific Integrated Circuit (ASIC). Each ASIC computing node comprises a system-on-chip ASIC utilizing four or more processors integrated into one die, with each having full access to all system resources and enabling adaptive partitioning of the processors to functions such as compute or messaging I/O on an application by application basis, and preferably, enable adaptive partitioning of functions in accordance with various algorithmic phases within an application, or if I/O or other processors are underutilized, then can participate in computation or communication nodes are interconnected by a five dimensional torus network with DMA that optimally maximize the throughput of packet communications between nodes and minimize latency.

Growing community of inventors

Yorktown Heights, NY, United States of America

Robert William Wisniewski