Nvidia Corporation

Robert William Chapman

Brad W Simeral

David G Reed

Mark Alan Overby

Roman Surgutchik

Dmitry Vyshetsky

John W Berendsen

Hari Unni Krishnan

Joshua Titus

Anand Srinivasan

Stephen Donald Lew

Paul Gyugyi

Andrew Currid

Edward L Riegelsberger

Chien-Ping Lu

Suyash Ranjan

Roman Surgutchick

Muralidharan Soundararajan Chilukoor

Circuits, methods, and apparatus that reduce the power consumed by data transfers initiated by a USB host controller. Peripheral devices on a USB network are accessed with a reduced frequency in order to save power dissipated by a CPU and other circuits when reading data needed by the host controller. Instead of possibly accessing devices each frame, peripheral devices are accessed during some frames, and not accessed during others. A USB host controller may have two or more modes, such as a low power mode and a regular mode. In the low power mode, USB devices are accessed during fewer than all frames, in the regular mode, USB devices are possibly accessed each frame. Mode selection may depend on whether battery power is used.

Reducing system power consumption due to USB host controllers

A software or hardware agent running on a personal computing (PC) device provides allows a consumer electronic device connected to the PC device over a high definition multimedia interface (HDMI) network to control the PC device using standardized commands. This enables a user to control the PC device and other consumer electronic devices that are connected to the HDMI network using a single interface. The agent responds as a consumer electronic device and translates the standardized commands as universal serial bus (USB) human interface device (HID) input reports to the PC device operating system. The agent represents the specific capabilities of the PC device as standard consumer electronic device controls.

HDMI network control of a media center computing device

Circuits, methods, and apparatus that reduce the power consumed by transactions initiated by a number of USB host controllers. Peripheral devices on a number of USB networks are accessed in a coordinated manner in order to reduce power dissipated by a CPU and other circuits when reading data needed by the host controllers. The resulting memory reads are temporally clustered. This allows the CPU to process a greater number of requests each time it leaves a low-power state. As a result, the CPU may possibly remain in a sleep state for a longer period of time, thus saving power. This is accomplished at the host controller level by synchronizing the time frames used by each host controller in a system. The synchronizing signal may be one or more bits of a frame count provided by one host controller to a number of other frame controllers.

Synchronizing multiple USB controllers to reduce power

A software or hardware agent running on a personal computing device provides allows application programs to interact with consumer electronic devices using standardized controls. The consumer electronic devices appear to be directly connected to the personal computing device rather than being connected over a high definition multimedia interface (HDMI) network. This enables a user to control the consumer electronic devices using a single interface rather than a separate interface for each consumer electronic device. The agent enumerates a universal serial bus (USB) human interface device (HID) for each consumer electronic device reported on the HDMI network. The USB HIDs represent the specific capabilities of the each one of the consumer electronic devices.

HDMI consumer electronics control common interface

A data path controller, a computer device, an apparatus and a method are disclosed for integrating power management functions into a data path controller to manage power consumed by processors and peripheral devices. By embedding power management within the data path controller, the data path controller can advantageously modify its criteria in-situ so that it can adapt its power management actions in response to changes in processors and peripheral devices. In addition, the data path controller includes a power-managing interface that provides power-monitoring ports for monitoring and/or quantifying power consumption of various components. In one embodiment, the data path controller includes a power-monitoring interface for selectably monitoring power of a component. It also includes a controller for adjusting operational characteristics of the component for modifying the power consumed by the component to comply with a performance profile, which generally specifies permissible power consumption levels for the component.

Data path controller with integrated power management to manage power consumption of a computing device and its components

A scalable port controller architecture supporting data streams of different speeds. In an embodiment, a port controller contains high speed receptor units and low speed receptor units, and a port routing logic connecting each external device (on corresponding port) to one of the receptors according to various registers. The port routing logic may connect an external device to one of the receptors, which determines the data rate at which data on a corresponding virtual connection from the external device is being received/sent. If the receptor does not have sufficient capacity (based on the data rate) to communicate with the external device, the connection is moved to other receptors, potentially in another control unit.

Scalable port controller architecture supporting data streams of different speeds

A method and system for implementing a generalized system stutter are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of blocking a first request received from a first of a plurality of bus masters during a low power state of a computing device for as long as permissible by the timing requirements of the computing device, wherein the first request is capable of triggering the computing device to transition out of the low power state, and during an active state of the computing device, servicing the first request along with other pending requests from the rest of the plurality of bus masters before the computing device transitions back to the low power state.

Method and system for implementing generalized system stutter

A system and method for transitions a computing system between operating modes that have different power consumption characteristics. When a system management unit (SMU) determines that the computing system is in a low activity state, the SMU transitions the central processing unit (CPU) into a low power operating mode after the CPU stores critical operating state of the CPU in a memory. The SMU then intercepts and processes interrupts intended for the CPU, modifying a copy of the critical operating state. This effectively extends the time during which the CPU stays in lower power mode. When the SMU determines that the computing system exits a low activity state, the copy of the critical operating state is stored in the memory and the SMU transitions the CPU into a high power operating mode using the modified critical operating state.

Platform-based idle-time processing

A system has a plurality of different clients. Each client generates a report signal indicative of a current latency tolerance associated with a performance state. A controller dynamically determines a power down level having a minimum power consumption capable of supporting the system latency of the configuration state of the clients.

Apparatus, method, and system for dynamically selecting power down level

A computer device, an input/output ('I/O') communication subsystem, a chipset and a method are disclosed for implementing interrupt message packets to facilitate peer-to-peer communications between a device controller and a coprocessor. Advantageously, the various embodiments of the invention obviate a requirement for specialized circuitry on a motherboard to establish peer-to-peer communications. In one embodiment, an I/O communication subsystem includes a bus interface for coupling the I/O communication subsystem to a general-purpose bus. It also includes a device controller being configured to generate an interrupt as an interrupt message packet for a coprocessor, which, in turn, interrupts processing functions that otherwise are performed by the host processor. The device controller can reside either internal or external to the I/O communication subsystem.

Growing community of inventors

Mountain View, CA, United States of America

Robert William Chapman