International Business Machines Corporation

Robert William Callahan

Paul Eugene Kauffman

Sivarama K Kodukula

Raymond E Losinger

Joseph P Buonomo

Matthew J Mitchell, Jr

Howard Loomis Page

James W Valashinas

Steven R Houghtalen

Harry L Tredennick

Lawrence Joseph Kobesky

Brion N Shimamoto

A microprocessor chip which is capable of executing a specific subset of instructions on behalf of the main storage portion of a computer memory can be made to emulate direct execution instructions not in that specific subset while working on behalf a control storage portion of the computer memory in a manner which is transparent to the main storage portion by means of a novel set of operand space selection instructions in the control storage portion and a novel switching circuit on the microprocessor chip which controls the access of the chip to the control store portion and the main store portion.

Microprocessor implemented data processing system capable of emulating

In a data processing system having a plurality of channels that are organized for separately processing the operations of specific I/O devices and the operations that are background to these specific operations, apparatus for transferring the background processing from one channel to another channel to distribute the background processing load. A system of registers and lines connect these registers to the channels for controlling these operations. Each channel processor has a request register for use in designating that background processing has been completed and that processing of a device oriented portion of a channel program is to begin, and a completion register set by an associated I/O processor for use in signifying that processing of a device oriented portion of a channel program has been completed and that background processing is to begin.

Data processing system with apparatus for sharing channel background

Apparatus for signalling the occurrence of a match between an address that is supplied to a control store and an address that is to be watched for in a data processing system that executes several instruction streams concurrently. The apparatus signals the occurrence of a storage accessing operation at a location that is uniquely identified only by a virtual address that is longer than the actual address used in accessing the store. Means is provided for comparing the actual address used in accessing the store with the corresponding portion of the complete address, and means is provided for recording the location of an address to be watched for in a particular frame of the store and for signalling a match that occurs in such a frame. The apparatus is useful for testing the operation of the data processing system by relating a recurring malfunction of the system to the execution of an instruction at the address that is watched for.

Address match for data processing system with virtual addressing

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Endwell, NY, United States of America

Robert William Callahan