Seagate Technology Incorporated

Western Digital Technologies, Inc.

Netapp, Inc.

Lsi Corporation

Robert W Warren, Jr

Paul J Huelskamp

Bret S Weber

Mark David Hagen

Kent Douglas Anderson

Gregory Lee Silvus

Robert E Ober

Joshua A Johnson

Kyle Leonard Nelson

Disclosed is a storage system. A network interface device (NIC) receives network storage commands from a host. The NIC may cache the data to/from the storage commands in a solid-state disk. The NIC may respond to future network storage command by supplying the data from the solid-state disk rather than initiating a network transaction.

Method and system for local caching of remote storage data

Disclosed is a method and apparatus for testing devices that will be connected to a computer storage media device by generating a complex test waveform that emulates operation of the computer storage media device using at least one Graphics Processing Unit (GPU) and applying the generated complex test waveform to the device(s) being tested. The complex test waveform may be generated by calculating a plurality of discrete individual portions of the complex test waveform in parallel, in real-time, and continuously using the parallel processing features of the GPU(s). The discrete individual portions of the complex test waveform may be representative of various characteristics of the emulated computer storage media device operation such as operational characteristics of the computer storage media device, environmental effects on the computer storage media device, application of filters to the computer storage media device signal, etc. Various embodiments may generate the base data signal waveform from the emulated computer storage device such that the entire complex test waveform is calculated. Other embodiments may use a pre-existing base data signal waveform provided from another source and modify/alter the pre-existing base data signal waveform to generate the complex test waveform. When available, one or more Central Processing Units (CPUs) and/or CPU cores may also perform calculations in parallel with the calculations performed by the GPU(s).

GPU computational assist for drive media waveform generation of media emulators

According to one embodiment of the present invention, a data storage device comprises a generic host interface and a media controller. The host interface has a channel select bit encoder to assert one or more channel select bits to be decoded by the media controller to indicate one or more virtual channels through which the host interface will communicate with the media controller over a data bus. A virtual channel controller in the host interface establishes a peer-to-peer connection with a virtual channel controller in the media controller based on the virtual channel indicated by the one or more channel select bits. A communication controller in the host interface implements a communication protocol for communication with a host and transfers data to and from the media controller via the peer-to-peer connection based on the communication with the host.

Method and system for generic data transfer interface

A method and system for interleaving storage of data streams on a rotating storage medium of a data storage device comprise dividing the storage medium into a plurality of logical zones. Each logical zone of the plurality of logical zones extends radially from an inner diameter of the storage medium to an outer diameter of the storage medium. Data from a first stream of data is written to a first logical zone of the plurality of logical zones for up to an amount of time corresponding to the rotational speed of the storage medium and the size of the first logical zone.

Method and system for time based file storage

Method and apparatus for transferring data. The apparatus preferably includes a first volatile memory block, a second volatile memory block coupled to a non-volatile circular buffer, and a controller configured to direct first data to the first volatile memory block for subsequent transfer to a downstream block, such as a data storage array. The controller is further configured to direct second data to the second volatile memory block for subsequent transfer to the non-volatile circular buffer. Preferably, the second volatile memory block forms a portion of a non-volatile random access memory (NVRAM) and the circular buffer is formed from a flash memory device. An intelligence block preferably controls said subsequent transfer of the second data from the second volatile memory block to the circular buffer. The second data are preferably transferred from the circular buffer to the downstream block in conjunction with the transfer of the first data.

Enhanced data integrity using parallel volatile and non-volatile transfer buffers

An apparatus and method are provided for testing integrated circuits. An integrated circuit arrangement is provided having first and second dice. Each die has circuitry for diagnostic testing in response to a diagnostic test signal. The circuitry further defines an input for receiving the diagnostic test signal and an output for transmitting results of the diagnostic testing for each of the dice. Interconnecting circuitry between the dice transmits the diagnostic test signal transmitted to the first die to the second die before the diagnostic testing is completed in the first die.

Testing device and method for an integrated circuit

A signal processing system includes a receiver for receiving an analog signal. The system also includes an analog-to-digital converter (ADC) coupled to the receiver. At each of a series of time intervals, the ADC outputs sequential digital codes. Each digital code corresponds to a sampled analog value of the received analog signal at each sample interval. The system further includes a memory in which the sequential digital codes may be stored, and a processing circuit for converting the digital codes into a series of binary data bits. The conversion may be performed in a different sequence than the sequence in which the digital codes are stored in the memory.

Decoupling of analog input and digital output

The present invention compensates for variations in the angular velocity of the drive's spindle motor by periodically dropping clocks to a counter based upon the previous servo wedge-to-wedge timing. This enables a substantially constant count to be maintained between servo wedges and allows a more predictable generation of the data sector pulses. A more predictable generation of the data sector pulses enables the size of the guard band preceding each data sector to be decreased and the capacity of the disk to be correspondingly increased.

Growing community of inventors

Loveland, CO, United States of America

Robert W Warren, Jr