International Business Machines Corporation

Robert W St John

Dan F Greiner

Anthony Thomas Sofia

Peter Grimm Sutton

Matthias Klein

Matt Richard Hogstrom

Joseph L Temple, Iii

Robert R Rogers

Nicholas P Sardino

Jim Mulder

A fishing pole holder is disclosed including a main frame with a front and rear lateral member connected to each other by two side members. The front and rear lateral member extending beyond each of the side members by a distance (e.g., 4 inches to 12 inches) for straddling wheel wells of a truck bed. Two movable frames have side sections that are rotatably coupled to a respective one of the two side members by a pivot and have a plurality of tubular rod holders affixed thereto. Each of the movable frames rotate about each pivot between a first position in which the tubular rod holders are substantially perpendicular to side members and a second, locking position (e.g., using a pin) in which the tubular rod holders are at a non-zero angle with respect to the side members.

Truck bed fishing pole holder

Embodiments include techniques for detection of data offloading through instrumentation analysis, where the techniques include monitoring, via a processor, an execution of a job, and analyzing processes associated with the job to determine a pattern. The techniques also include determining whether the pattern of the job is associated with a pattern for a workload type, and classifying the job based at least in part on the determination.

Detection of data offloading through instrumentation analysis

Identifying computer program execution characteristics for determine relevance of pattern instruction executions to determine characteristics of a computer program. Filters are utilized to determine which subsequent occurrences of execution of at least one computer instruction are relevant to a counter based on execution characteristics of the at least one computer instruction where the counter counts the subsequent occurrences of execution of at least one computer instruction following prior executions of the same at least one computer instruction.

Filtering based on instruction execution characteristics for assessing program performance

A mutability mechanism is provided for parsing an object at loading time. The mutability mechanism inserts a property into the object that indicates whether or not the object is immutable. The mutability mechanism looks at the code for the object and determines whether any other objects can modify the object. If the object cannot be modified after it is created, then the new property is set to indicate that the object is immutable; otherwise, the property is set to indicate that the object is mutable. This property can be inspected at runtime when a call is made to a program object. If an object passed as an argument is marked mutable, a clone of this object must be passed to the callee. However, if an object passed as an argument is marked immutable, a simple reference to the object may be passed as an argument to the callee.

Method, apparatus, and program to determine the mutability of an object at loading time

A programmable prefetch mechanism is presented for prefetching instructions for a processor executing a program, and in particular a non-procedural program such as object-oriented code. The prefetch mechanism includes prefetching instructions from memory which are sequential instructions from where the processor is currently executing in a sequence of instructions of the program, and when the prefetching encounters a new update prefetch stream (UPS) instruction, the prefetching includes executing the UPS instruction and subsequent thereto, branching to a new memory address for prefetching of at least one non-sequential instruction from memory for execution by the processor. The UPS instruction can be inserted into the program at compile time and when executed causes the loading of a prefetch buffer in the prefetch mechanism which in one embodiment includes a set associative array of x,y address pairs. When an incremented prefetch address is matched to an x address of the array, the prefetching branches to the new memory address y paired with the matching x address in the prefetch buffer. In this manner, cache misses associated with unconditional branches to non-sequential instructions are avoided.

Growing community of inventors

Hyde Park, NY, United States of America

Robert W St John