Motorola Corporation

Robert W Sparks

Paul D Shannon

Brian F Wilkie

Hiroyuki Oka

Paul E Grimme

George G Grimmer, Jr

Phillip S Smith

A method and apparatus for post-packaging testing of one-time programmable memories provided means for assuring that each cell of the memory will appear to a customer to be erased and that it is capable of being programmed. The preferred embodiment of the invention is a microcomputer including one-time programmable memory, but the invention also includes memory-only devices. Marginal reading method and apparatus provide for detecting the threshold voltage of memory cells below the level at which the cell appears to the customer to be erased and marginal programming method and apparatus provide for slightly increasing the threshold voltage of cells in order to ensure their programmability.

Method and apparatus for post-packaging testing of one-time programmable

A method and apparatus for post-packaging testing of one-time programmable memories provides means for assuring that each cell of the memory will appear to a customer to be erased and that it is capable of being programmed. The preferred embodiment of the invention is a microcomputer including one-time programmable memory, but the invention also includes memory-only devices. Marginal reading method and apparatus provide for detecting the threshold voltage of memory cells below the level at which the cell appears to the customer to be erased and marginal programming method and apparatus provide for slightly increasing the threshold voltage of cells in order to ensure their programmability.

A write protect mechanism for a programmable read-only memory prevents writes to the PROM unless a protect register contains predetermined information. The protect register is itself a write protected control register. The predetermined information cannot be written into the protect register except during a short, predetermined period after the occurrence of an event such as a reset. The protect register may be written to with information other than the predetermined information at any time. The preferred embodiment comprises a single-chip microcomputer with on-board electrically-erasable programmable read-only memory which is write protected in several, separate blocks.

Write protect mechanism for non-volatile memory

A single-chip microcomputer comprises at least two separate and independent electrically erasable programmable read only memories (EEPROMs) on-board which may be independently programmed, erased and read. Each part of the split EEPROM has its own data bus and address bus. Programming and erasing is controlled by a program register which has separate bits for configuring and latching the data and address buses of a selected EEPROM array, for providing programming voltage to the array of choice and for choosing between programming and erasing the selected array. The split EEPROM provides versatility to the user in allowing one part of the EEPROM to be programmed while the program stored in another part of the EEPROM or RAM may be read and utilized. In addition, test time and effort of the microcomputer may be considerably reduced.

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Austin, TX, United States of America

Robert W Sparks