Micron Technology Incorporated

Robert W Mason

Pitamber Shukla

Scott Anthony Stoller

Kenneth William Marr

Steven Michael Kientz

Chi Ming Chu

Hossein Afkhami

Tieniu Li

Ekamdeep Singh

Qun Su

Phani Raghavendra Yasasvi Gangavarapu

Methods, systems, and devices for methods for performing voltage sweep operations are described. Based on detecting a failure at a portion of a memory device, the memory system controller may initialize a voltage sweep operation to identify threshold voltages of the memory cells at the portion of the memory device. In one example, the memory system controller may identify and store a value (e.g., a delta value) that represents a difference between a quantity of transitions experienced by a first memory cell at a first voltage iteration and a quantity of transitions experienced by the first memory cell at a second voltage iteration. In another example, the memory system controller may identify the quantity of transitions from a first logic state to a second logic state and a quantity of transitions from the second logic state to a first logic state and store such values in respective memory arrays.

Methods for performing voltage sweep operations

Methods, systems, and apparatuses include determining a read counter for a portion of memory of a memory device satisfies a read threshold. A weighted subportion identifier for the portion of memory is selected in response to the read counter satisfying the threshold. The weighted subportion identifier is selected probabilistically, a probability of selection based on defectivity information for subportions of memory of the portion of memory. A subportion of memory is determined using the weighted subportion identifier. A data validity scan is performed on the subportion of memory.

Probabilistic data integrity scans using risk factor estimation

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including initializing the memory device; selecting at least one sample management unit on the memory device; performing a calibration operation on the sample management unit to determine a duration value reflecting a duration during which the memory device was powered down; adjusting an accumulator value based on the duration value; determining a read voltage value based on the accumulator value; and performing a read operation using the read voltage value.

Determining read voltage offset in memory devices

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations comprising performing a set of write operations on a first block in a first plane of the memory device and on a second block in a second plane of the memory device, performing a program verification check on the first block, responsive to determining that the first block fails the program verification check, incrementing a counter value associated with the second block; responsive to the counter value satisfying a threshold criterion, performing a failure verification operation on the second block, and responsive to determining that the second block fails the failure verification operation, retiring the second block.

Managing defective blocks during multi-plane programming operations in memory devices

Exemplary methods, apparatuses, and systems including memory self-recovery management to correct failures due to soft-error rate events. The self-recovery manager detects a failure of a memory device. The self-recovery manager retrieves a set of register values from the memory device. The self-recovery manager stores the set of register values from the memory device. The self-recovery manager issues a reset command to the memory device, the reset command including generating a re-initialized set of register values. The self-recovery manager compares the set of register values with the re-initialized set of register values. The self-recovery manager triggering a self-recovery attempt using the comparison of the set of register values with the re-initialized set of register values.

Memory system failure detection and self recovery of memory dice

Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including periodically, at a predefined frequency, incrementing a value stored in an accumulator by a composite parameter value; responsive to receiving a program request specifying a data item to be programmed to a management unit of the memory device, obtaining a first value from the accumulator; storing the first value to a program reference table; programming the data item to the management unit; responsive to receiving a read request specifying the management unit, obtaining a second value from the accumulator; determining a read voltage value based on a difference of the first value and the second value; and performing a read operation, using the read voltage value, on the management unit.

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Boise, ID, United States of America

Robert W Mason