Silicon Graphics, Incorporated

Silicon Graphics International Corporation

Robert W Cutler

Martin M Deneroff

Eric Carl Fromm

Rodney A Ruesch

Michael Brown

Brian Justin Johnson

Richard G Finstad

Richard T Ingebritson

Steven Hein

Kim Gustafson

Dale R Purdy

John F Steiner

Processor clock signals are generated for each processor in a HPC system, such that all the processor clock signals are of the same frequency. Furthermore, as part of a startup (boot) procedure, a process sets all time stamp counters (TSCs) of the processors, such they indicate identical times. Each blade of the HPC system recovers a recovered clock signal from a synchronous communication network, to which the blade is coupled. The blade generates a processor clock from the recovered clock signal and provides the processor clock to processor(s) on the blade. Each chassis is coupled to a second, system-wide, synchronous communication network, and each chassis synchronizes its chassis synchronous communication network with the system-wide synchronous communication system. Thus, all the processor clock signals are generated with the same frequency.

Global synchronous clock circuit and method for blade processors

A modular computer system includes at least two processing functional modules each including a processing unit adapted to process data and adapted to input/output data to other functional modules through at least two ports with each port including a plurality of data lines. At least one routing functional module is adapted to route data and adapted to input/output data to other functional modules through at least two ports with each port including a plurality of data lines. At least one input or output functional module is adapted to input or output data and adapted to input/output data to other functional modules through at least one port including a plurality of data lines. Each processing, routing and input or output functional module includes a local controller adapted to control the local operation of the associated functional module, wherein the local controller is adapted to input and output control information over control lines connected to the respective ports of its functional module. At least one system controller functional module is adapted to communicate with one or more local controllers and provide control at a level above the local controllers. Each of the functional modules adapted to be cabled together with a single cable that includes a plurality of data lines and control lines such that control lines in each module are connected together and data lines in each unit are connected together. Each of the local controllers adapted to detect other local controllers to which it is connected and to thereby collectively determine the overall configuration of a system.

System and method for a hierarchical system management architecture of a highly scalable computing system

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Chippewa Falls, WI, United States of America

Robert W Cutler