Apple Inc.

Robert V Welland

Daniel J Culbert

Walter R Smith

A structure and method for routing information desired by a particular entity within a pen-based computer system to that entity are provided. The desired information is contained in &ldquo;packages&rdquo; containing the desired information in one or more &ldquo;parts&rdquo; and also containing a package directory (located in front of the parts) that identifies the package and provides selected information about the package and its parts. The packages are received and processed by a package manager that maintains a registry of entities that desire specified types of information (parts) that might be found in an incoming package. When the package manager receives a package containing such information, it routes the part containing that information to a &ldquo;part handler&rdquo; associated with the entity requesting the information. The package manager then updates a package registry to reflect that the package has been successfully delivered.

Structure and protocol for routing information in a system

A system for extending the data capacity of a primary storage device in a computer which utilizes transparent data compression. The system utilizes a compressed memory even within the primary storage device along with a compression/decompression algorithm to extend the memory space. The system also includes a water line or limit within the primary storage device to ensure that memory space is always available.

Method and apparatus for transparently compressing data in a primary

A memory management unit (MMU) for controlling a CPU's right to access a memory in order to initiate performance of an operation. The MMU includes a translator for translating a virtual address issued by the CPU into a physical address, a domain number and a permission, and an environment controller for determining if a portion of the memory corresponding to the domain number can be accessed by the CPU. The translator includes a translation look-aside buffer (TLB) for generating the physical address, the domain number and the permission, provided an entry in a translation table of the TLB matches a page number component of the virtual address. The translator also includes translation table look-up logic which supplies entry information to the translation table of the TLB by finding a match for the page number component in the memory if a match cannot be found in the TLB. The translator also includes permission control logic which evaluates the permission and either stops the operation or allows it to continue to be performed. The MMU also typically includes a manager which has the ability, primarily based on the domain number, to override the decisions of the permission control logic.

Memory management unit for managing address operations corresponding to

A memory management unit (MMU) having cross-domain control for controlling a CPU's right to access a memory in order to initiate performance of an operation. The MMU includes a translator for translating a virtual address issued by the CPU into a physical address, a data domain number (DDN) and an address domain number (ADN) both corresponding to a domain (a portion of the virtual address space), and a permission. The MMU further includes an environment controller for determining if the ADN corresponding to the operation is allowed access by the CPU. The translator includes an address translation unit (ATU), a data translation unit (DTU), translation table lookup logic, and permission control logic. The ATU generates the physical address, the ADN, and the permission from the virtual address. The DTU generates the DDN of tagged data specified by the CPU if the tagged data is a pointer. The TTLL supplies entry information to the ATU and DTU. The permission control logic evaluates the permission and either stops the operation or allows it to continue to be performed. The MMU further includes cross-domain control logic which evaluates the ADN and DDN to detect the attempted flow of domain specific information as a result of the operation. The cross-domain control logic includes the ability to prohibit the flow of information between domains and also includes the ability to prohibit the flow of control by the CPU between domains.

Memory management unit having cross-domain control

A stochastic priority based scheduler for selecting executable tasks in a computer system is disclosed. The stochastic priority based scheduler selects tasks on the basis of a random number weighted by task priority. Since every task has a nonzero finite probability of being selected, the probability being proportional to the task priority, all tasks, even low priority ones, have a chance of being selected, thus eliminating the lockout problem.

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Menlo Park, CA, United States of America

Robert V Welland