Motorola Corporation

Motorola Solutions, Inc.

Kemet Electronics Corporation

Other

Google Inc.

Robert T Croswell

Gregory Joseph Dunn

Bruce D Mueller

Jovica Savic

Aroon V Tungare

Remy J Chelini

Rodger W Caruthers

Randall Brace

Duane S Andres

Philip Michael Lessner

John Tony Kinard

John D Prymak

Chris Stolarski

John Allan Svigelj

Chris Wayne

Alethia Melody

George H Kumpf

Ke Keryn Lian

Arnold Reisman

Robert B Lempkowski

Dorota Temple

Keith R Brenneman

David W Jacobs

Manes Eliacin

Timothy B Dean

Jaroslaw A Magera

Claudia Gamboa

Michael D Prevallet

Remy J Chilini

Zhiyuan Z Li

Darrell L Simpson

C Kenneth Williams

A device, system and method for radio-frequency emissions control is provided. The device comprises: a communication unit configured to communicate via main radio channels and a control channel, the main radio channels contributing to radio-frequency (RF) emissions; and a controller interconnected with the communication unit. The controller is configured to: receive, via the communication unit communicating over the control channel, an RF emissions control command to reduce the RF emissions emitted by the communication unit; and in response to receiving the RF emissions control command, control one or more of the communication unit and activity on the main radio channels to reduce the RF emissions.

Device, system and method for radio-frequency emissions control

A device, system and method for frequency hopping control is provided. The device comprises: a communication unit configured to communicate via main radio channels and a control channel; and a controller interconnected with the communication unit. The controller is configured to: receive, via the communication unit communicating over the control channel, a frequency hopping control command comprising a list of one or more hopping frequencies for frequency hopping; and in response to receiving the frequency hopping control command, control the communication unit to communicate via the main radio channels using frequency hopping according to the one or more hopping frequencies.

Device, system and method for frequency hopping control

A device for use with an imaging system that is operable to provide an image signal based on an object disposed at a first distance from the imaging system. The imaging system includes a first camera, a second camera and a display. The first camera is operable to generate a first image signal based on the object and includes a first optics system and a first detector. The first optics system has a focal length, whereas the first detector has a resolution. The second camera is operable to generate a second image signal based on the object. The second camera includes a second optics system and a second detector. The second optics system has the same focal length of the first optics system and the second detector has the same resolution as the first detector. The second camera is separated from the first camera by a second distance. The display is operable to display an image based on a modified image. The device comprises an image processor that is operable to establish a virtual separation membrane and to output a modified image based on the first image signal, the second image signal, the virtual separation membrane, the second distance, the focal length and the resolution.

System and method for providing depth imaging

An improved method for forming a capacitor. The method includes providing a carrier with a channel therein, providing a metal foil with a valve metal with a first dielectric on a first face of the metal foil, securing the metal foil into the channel with the first dielectric away from a channel floor, inserting an insulative material between the metal foil and each side wall of the channel, forming a cathode layer on the first dielectric between the insulative material, forming a conductive layer on the cathode layer and in electrical contact with the carrier, lap cutting the carrier parallel to the metal foil such that the valve metal is exposed, and dice cutting to form singulated capacitors.

Channel method for forming a capacitor

An improved method for forming a capacitor. The method includes the steps of: providing a metal foil; forming a dielectric on the metal foil; applying a non-conductive polymer dam on the dielectric to isolate discrete regions of the dielectric; forming a cathode in at least one discrete region of the discrete regions on the dielectric; and cutting the metal foil at the non-conductive polymer dam to isolate at least one capacitor comprising one cathode, one discrete region of the dielectric and a portion of the metal foil with the discrete region of the dielectric.

Thin solid electrolytic capacitor embeddable in a substrate

A high impedance surface () has a printed circuit board () with a first surface () and a second surface (), and a continuous electrically conductive plate () disposed on the second surface () of the printed circuit board (). A plurality of electrically conductive plates () is disposed on the first surface () of the printed circuit board (), while a plurality of elements are also provided. Each element comprises at least one of (1) at least one multi-layer inductor () electrically coupled between at least two of the electrically conductive plates () and embedded within the printed circuit board (), and (2) at least one capacitor () electrically coupled between at least two of the electrically conductive plates (). The capacitor () comprises at least one of (a) a dielectric material () disposed between adjacent electrically conductive plates, wherein the dielectric material () has a relative dielectric constant greater than 6, and (b) a mezzanine capacitor embedded within the printed circuit board ().

High impedance electromagnetic surface and method

Embedded capacitors comprise a bimetal foil () that includes a first copper layer () and an aluminum layer () on the first copper layer. The aluminum layer has a smooth side adjacent the first copper layer and a high surface area textured side () opposite the first copper layer. The bimetal foil further includes an aluminum oxide layer () on the high surface area textured side of the aluminum layer, a conductive polymerlayer () on the aluminum oxide layer, and a second copper layer () overlying the aluminum oxide layer. The bimetal foil may be embedded in a circuit board () to form high value embedded capacitors.

Embedded capacitors and methods for their fabrication and connection

A dielectric circuit board foil () includes a conductive metal foil layer (), a crystallized dielectric oxide layer () disposed adjacent a first surface of the conductive metal foil layer, a lanthanum nickelate layer () disposed on the crystallized dielectric oxide layer, and an electrode layer () that is substantially made of one or more base metals disposed on the lanthanum nickelate layer. The foil () may be adhered to a printed circuit board sub-structure () and used to economically fabricate a plurality of embedded capacitors, including isolated capacitors of large capacitive density (&#x3e;1000 pf/mm).

Printed circuit dielectric foil and embedded capacitors

A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating () a ceramic oxide layer () overlying a conductive metal layer () overlying a printed circuit substrate (), perforating () the ceramic oxide layer within a region (), and removing () the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.

Printed circuit patterned embedded capacitance layer

One of a plurality of capacitors embedded in a printed circuit structure includes a first electrode () overlaying a first substrate layer () of the printed circuit structure, a crystallized dielectric oxide core () overlaying the first electrode, a second electrode () overlying the crystallized dielectric oxide core, and a high temperature anti-oxidant layer () disposed between and contacting the crystallized dielectric oxide core and at least one of the first and second electrodes. The crystallized dielectric oxide core has a thickness that is less than 1 micron and has a capacitance density greater than 1000 pF/mm. The material and thickness are the same for each of the plurality of capacitors. The crystallized dielectric oxide core may be isolated from crystallized dielectric oxide cores of all other capacitors of the plurality of capacitors.

Printed circuit embedded capacitors

An organic semiconductor device () can be embedded within a printed wiring board (). In various embodiments, the embedded device () can be accompanied by other organic semiconductor devices () and/or passive electrical components (). When so embedded, conductive vias () can be used to facilitate electrical connection to the embedded device. In various embodiments, specific categories of materials and/or processing steps are used to facilitate the making of organic semiconductors and/or passive electrical components, embedded or otherwise.

Organic semiconductor device and method

High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy and epitaxial growth of single crystal silicon onto single crystal oxide materials. Monocrystalline substrates having a hydrogen ion implant are cleaved along the hydrogen ion implant, and an insulating substrate is bonded to the monocrystalline oxide.

Integration of monocrystalline oxide devices with fully depleted CMOS on non-silicon substrates

A layer of doped or undoped germanosilicate glass is formed on a substrate and the layer of germanosilicate glass is thermally treated in steam to remove germanium from the germanosilicate glass, and thereby raise the reflow temperature of the germanosilicate glass so treated. The layer of germanosilicate glass on the substrate may be a nonplanar layer of germanosilicate glass. When thermally treating the nonplanar layer of germanosilicate glass in steam, the layer of germanosilicate glass may be planarized simultaneously with the removal of germanium from the planarized germanosilicate glass. This process may be repeated to create a hierarchy of reflowed glass where each underlying layer reflows at a higher temperature than the next deposited glass layer. The steam thermal treatment step may be preceded by a thermal pretreatment of the layer of germanosilicate glass in at least one of a noble gas and nitrogen gas, to reflow the layer of germanosilicate glass. The thermal pretreating step may partially planarize the nonplanar layer of germanosilicate glass, and the thermal treating step may then fully planarize the partially planarized germanosilicate glass. Alternatively, the thermal pretreating step may fully planarize the layer of germanosilicate glass and the thermal treating step may then remove germanium from the fully planarized germanosilicate glass.

Growing community of inventors

Hanover Park, IL, United States of America

Robert T Croswell