Other

Micrel, Incorporated

Advanced Analogic Technologies Incorporated

Impala Linear Corporation

Siliconix Incorporated

Robert Stephen Wrathall

Kevin Peter D'Angelo

Steven J Franck

Martin J Alter

Carlos A Laber

Stephen McCormack

Provided are electrical circuits and methods for power factor correction. An example method includes receiving, by converter, an input voltage at a fundamental frequency and generating an output voltage; generating, based on the output voltage, a first measurement signal; subtracting a first reference signal from the first measurement signal to obtain a first error signal; generating an adaptive current sense signal, generating a reference voltage based on the input voltage, subtracting the reference voltage from the current sense signal thus generating a second measurement signal to control the current measurement; subtracting the second measurement signal from the input voltage to obtain a difference signal, wherein the difference signal is largely minimized by removing overtones of the fundamental frequency; generating, based on the difference signal, a second error signal; using a sum of the second error signal as a first order correction to the first error signal to regulate the converter.

Electrical circuits for power factor correction by measurement and removal of overtones and power factor maximization

Electrical circuits for power factor correction by measurement and removal of overtones using a constant or slowly varying first frequency

Electrical circuits for power factor correction by measurement and removal of overtones

A circuit for controlling a switching regulator is provided. The circuit includes a first input to receive a feedback signal from the switching regulator proportional to an output voltage of the switching regulator, a second input to receive a voltage reference signal, an output to be coupled to an input of the switching regulator, an error amplifier having a first input terminal coupled to the first input to receive the feedback signal, a second input terminal coupled to the second input to receive the voltage reference signal, and an output terminal coupled to the output, and a compensation network coupled between the second input and the output. The compensation network includes a series combination of a first capacitance and a first resistance coupled between the second input and a node, a second resistance coupled between the node and the output, and a second capacitance coupled to the node.

Systems for controlling high frequency voltage mode switching regulators

A switching regulator that includes a high-side MOSFET, a low-side MOSFET, a high-side driver circuit, a low-side driver circuit, and a capacitive coupling circuit. An output of the high-side driver circuit is coupled to a gate of the high-side MOSFET to control the high-side MOSFET to be substantially depleted during a first operational phase and to be substantially enhanced during a second operational phase. An output of the low-side driver circuit is coupled to a gate of the low-side MOSFET to control the low-side MOSFET to be substantially enhanced during the first operational phase and to provide a regulated drain-to-source current during the second operational phase. The capacitive coupling circuit is coupled to an input of the high-side driver circuit and the gate of the low-side MOSFET and decreases the regulated drain-to-source current during a transition from the first operational phase to the second operational phase.

Switching regulator with reduced body diode conduction

A method for controlling a switching voltage regulator that includes generating a feedback voltage that is proportional to the output voltage of the voltage regulator; generating a voltage proportional to the duty-cycle of the inductor charging and discharging phases as a function of the difference between the feedback voltage and a reference voltage; and adding a dominate pole and two zeros to the function used to generate the voltage proportional to the duty-cycle of the inductor charging and discharging phases.

Method for generating an internal compensation network of a pole and two zeros to compensate high frequency voltage mode switching regulators

A switching regulator that practices the current invention includes a high-side switch M1 connected between an input voltage and a node L. A low-side switch is connected between the node Land ground. An inductor L is connected between Land an output node (V). A filtering capacitor connects Vto ground. The switching regulator has two distinct operational phases. During the first operational phase, the high-side switch is OFF and the low-side switch is ON. During the second operational phase, the high-side switch is ON and the low-side switch acts as a current source. During transitions between the second and first operational phases, the low-side switch is controlled to momentarily decrease the regulated drain-to-source current.

Method for reducing body diode conduction in NMOS synchronous rectifiers

A power factor correction circuit responsive to an input power supply signal at an input supply voltage is described. The circuit includes rectifier circuitry for largely performing full-wave rectification on the input supply signal to produce a full-wave rectified supply signal at a full-wave rectified voltage and a full-wave rectified current susceptible of having at least one overtone of the fundamental supply frequency. The circuit also includes a regulator for regulating the full-wave rectified voltage to produce a regulated power supply voltage with reduced voltage ripple, the regulator operating in buck-boost mode, and control circuitry for measuring at least one such overtone in the full-wave rectified current. The control circuitry also provides the regulator with a primary control signal that causes at least one such overtone to be largely removed from the full-wave rectified current.

Boost-buck power factor correction

Systems and methods described herein provide for high speed power factor correction which can overcome or substantially alleviate the problems associated with changes in the operating conditions of a load or other transient events. The present technology senses the present state conditions of a signal to quickly and accurately determine the presence of an overtone component within the signal. The expected value of the overtone component is then determined based on the sensed state of the signal. Power factor correction is then performed to suppress the overtone utilizing a control signal formed based on the expected value of the overtone. By performing power factor correction based on the expected value, the present technology can provide high speed power factor correction which is not limited by the delay introduced by an adaptive feedback loop.

Systems and methods for high speed power factor correction

A reverse current comparator for use in switching regulators includes a differential stage configured to encode the difference in voltage between an N and a P input. The differential stage feeds one or more gain stages. At least one of the gain stages includes one or more hysteresis devices. When the voltage of the N input exceeds the voltage of the P input by a predetermined margin, the hysteresis device causes the regulator to enter a triggered state in which it outputs a non-zero output voltage. Subsequent changes to the N and P inputs do not change the regulator output until a RESET input is asserted and which point the regulator enters a reset state and is ready to be triggered.

Reverse current comparator for switching regulators

Reverse current comparator circuit and method for switching regulators

A power factor correction circuit () responsive to an input power supply signal at an input supply voltage (V) that varies largely sinusoidally with time at a fundamental supply frequency contains regulator/control circuitry (, and) for measuring and removing overtones (Ior I) in the input supply current (I) or in a rectified form (I) of the input supply current. Each overtone is expressible as the product of an amplitude component (I) and a sinusoidal function (Isin [(m+1)&#x3c9;t]) that varies with time at an integer multiple of the fundamental supply frequency. The regulator/control circuitry measures an overtone by determining the overtone's amplitude component. After generating an adjustment factor (S) largely as the product of that overtone's amplitude component and an associated sinusoidal function, the regulator/control circuitry adjusts the input supply current or its rectified form by an amount corresponding to the adjustment factor for each measured overtone.

Power factor correction by measurement and removal of overtones

A circuit for sensing a voltage across a power switch includes a transmission gate, a low pass filter and a comparator. The power switch is controlled by a control signal for turning the power switch on and off to generate a switching voltage at a first current handling terminal of the power switch. The transmission gate is turned on whenever the power switch is turned on to sample the voltage across the power switch when the power switch is turned on. The sampled voltage is filtered by the low pass filter to remove high frequency transients. Finally, the comparator compares the filtered voltage to a reference voltage. The comparator provides an output signal having a first value when the filtered voltage is less than the reference voltage. The circuit can be used as a load sensing circuit to sense the load condition under which the power switch is being operated.

Load sensing circuit for a power MOSFET switch

A compensation circuit for introducing a zero in a first circuit being incorporated in a closed loop feedback system includes a first capacitor, an amplifier with capacitive feedback and a second capacitor, connected in series between an input node and a summing node in the first circuit. In one embodiment, the summing node is an intermediate node between two gain stages of a second circuit in the first circuit. The capacitive feedback can be formed by a third capacitor coupled in parallel with one or more of the gain stages in the amplifier. In operation, the capacitance of the second capacitor and an input impedance of the second gain stage of the second circuit introduce a zero in the closed loop feedback system at the third node. The compensation circuit can be applied to a switching regulator controller for adding a zero in the feedback system of a switching regulator.

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Scotts Valley, CA, United States of America

Robert Stephen Wrathall