Digital Equipment Corporation

Hewlett-packard Development Company, L.p.

Compaq Computer Corporation, Inc.

Robert Stephen McNamara

Joel James McCormack

Larry D Seiler

Robert Alan Ulichney

Christopher C Gianos

Norman Paul Jouppi

Todd Aldridge Dutton

Laura Edwards Mendyke

Keith Farkas

James M Knittel

James T Claffey

Patrick D Charles

A method and apparatus for visiting all productive stamp positions for a two-dimensional convex polygonal object. The object is visited with a stamp that has a stamp rectangle, and one or more discrete sample points. A productive location is one for which the object contains at least one of the stamp's sample points when the stamp is placed at that location. An unproductive location is one for which the object contains none of the stamp's sample points when the stamp is placed at that location. Stamp locations are discrete points that are separated vertically by the stamp rectangle's height, and horizontally by the stamp rectangle's width. The stamp may move to a nearby position, or to a previously saved position, as it traverses the object. The stamp moves in such a way as to visit all productive locations for an object while avoiding most of the unproductive locations.

Efficient movement of fragment stamp

A method and apparatus for visiting all stamps that are relevant to a two-dimensional convex polygonal object. The object is visited with a rectangular stamp, which contains one or more discrete sample points. A relevant location is one for which the object contains at least one of the stamp's sample points when the stamp is placed at that location. Stamp locations are discrete points that are separated vertically by the stamp's height, and horizontally by the stamp's width. The stamp may move to a nearby position, or to a previously saved position, as it traverses the object. The plane in which the object lies is partitioned into rectangular tiles, which are at least as wide and high as the stamp. The invention visits stamp locations in an order that respects tile boundaries&mdash;that is, it visits all locations within one tile before visiting any locations within another tile. The invention may also be used with further partitioning of the plane (metatiles), so that it will visit all locations within a metatile before visiting any locations within another metatile, and further visit all locations within a portion of a tile within the current metatile before visiting any locations within a portion of a different tile within the current metatile.

Method and apparatus for tiled polygon traversal

In a graphics pipeline, a rasterizer circuit generates fragments for an image having multiple surfaces that have been tessellated into primitive objects, such as triangles. First and second fragments are associated with the same pixel. A merge buffer merges the first fragment with the second fragment when the two fragments belong to the same tessellated surface, the first fragment's primitive is adjacent to the second fragment's primitive, both fragments face either toward or away from the viewer, and the first and second fragment are sufficiently similar that merging is unlikely to introduce visually objectionable artifacts. A frame buffer receives fragments from the merge buffer, stores the fragments, combines the fragments into pixels, and outputs the pixels to a display.

System and method for producing an antialiased image using a merge buffer

An apparatus generates one-dimensional dither values for dithering linear digital signals where each digital signal having an address and a signal value. The apparatus includes a counter incremented for each sequential address of the digital signals. A predetermined number of least significant bits from the current values of the counter are selected and reversed wired to generate dither values that are applied to the corresponding signal values.

Apparatus for generating one-dimensional dither values

A computer graphics system renders an image on a display device using improved pre-filtering techniques that minimize aliasing artifacts in the image, particularly at the endpoints of lines. To anti-alias the image, a plurality of edges are placed near a line in the image. An edge function represents the edge. This edge function is multiplied by a scale factor to produce a distance function. This scale factor is the reciprocal of the Euclidean length of the line. The distance function is evaluated to determine the distance of selected pixels from each edge in units of pixels. These distances determine the intensity value for each selected pixel. Pixels on or beyond an edge, with respect to the line, are given a minimum intensity value; pixels inside all edges are given intensity values corresponding to their distances from the edge. An intensity function describing a relationship between pixel distances from the edges and their corresponding intensity values is developed. The intensity function can be implemented in a look-up table or approximated with hardware.

Pre-filtered antialiased lines using distance functions

An apparatus for dithering a signal such as a pixels of an image having multiple address dimensions. A predetermined number of least significant bits of a first address of the pixel are used to index a one-dimensional dither array. Indexing the array produces a first dither value. A predetermined least number of significant bits of a second address of the pixel are combined with the first dither value to index a second one-dimensional dither array. The indexing of the second array produces a final dither value that can be used to dither the pixels.

Multi-dimensional dithering using one-dimensional dither arrays

A method for improving the performance of a graphics system includes the steps of allocating appropriate pixels to slices of memory such that corresponding subsets of bits of neighboring pixels are allocated to different slices of memory, where `neighboring pixels` includes both consecutive pixels in a scan line, or pixels in consecutive scan lines. In addition, hardware is provided that allows for the individual memory slices to be independently accessed, thus allowed each slice to access data from a different 64 bit word in video memory during one video access period. Controllers which independently access the memory slices are advantageously totally time independent, to allow the most flexibility in the starting and finishing of the access of the memory slice. Performance is further gained by buffering of both the read and write requests to the video memory. Buffering requests allows reads and writes to neighboring locations to be merged to allow for the maximal bus utilization and minimizes the number of stalls in the video subsystem.

Method for providing improved graphics performance through atypical

A video subsystem of a computer processor is shown to include a graphics controller coupled to a video memory. A method for improving graphics performance for applications which use fewer bits per pixel than provided in the graphics subsystem includes the steps of rearranging the pixel and byte data in video memory such that corresponding bytes of different pixels are stored in different, simultaneously accessible locations of the video memory. With such an arrangement, accesses to video memory may be provided which utilize all of the available bytes of the video memory bus, thereby increasing the performance of the graphics operation. In addition, a graphics system having a plurality of independently operating memory controllers is shown to further improve graphics performance by ensuring that the video memory bus operates at full capacity.

Method for quickly painting and copying shallow pixels on a deep frame

This disclosure relates to an image processing system which relies upon quantization and dithering techniques to enable an output device, which has a given number of output levels, to accurately reproduce a image which is generated by an input device, which has a greater or equal number of input levels. Generally, neither the number of input nor output levels need to be a power of two. The present invention is implemented in a number of different embodiments. These embodiments generally rely upon an image processor which, depending on the particular implementation, includes memory devices and an adder, a comparator, or a bit shifter. Additional embodiments use an image adjustment system or an image modification system to refine the raw input levels of the input device, in order to create an improved output image. Also, the particular embodiments of the image processors can be used in connection with imaging systems having bi-tonal, monochromatic, or color input and output devices.

Input modification system for multilevel dithering

An apparatus and method for storing pixel data in a video memory having a plurality of slices increases the performance of line drawing by ensuring that for a given pixel, neighboring pixels in neighboring scan lines are stored in separate slices of video memory. One embodiment of the invention includes the step of appending a number of offset bits to the end of each scan line, where the number of offset bits is less than the total number of bits contained in the plurality of slices. Another embodiment of the invention rearranges the pixels of every other scan line. Another embodiment adds an offset number of pixels which is equal to the number of pixels per slice times the number of slices, then alternates ordered pixels with rearranged pixels throughout successive scan lines. Performance is further increased by providing a plurality of memory controllers corresponding to the plurality of slices of memory which may operate asynchronously to interleave memory access commands. Therefore, during line draw operations successive pixels which reside in different slices of memory may be accessed in one command, and subsequent accesses may be interleaved to further increase the performance of line drawing operations.

Method for increasing the performance of lines drawn into a framebuffer

A central processor unit sends known simulated data signals to the video display subsystem and disk storage subsystem of a computer system; the simulated data is processed by the subsystems as if it were real data and is then returned to the processor. The processed signals or their error detecting codes are compared with the corresponding information expected to be returned and an error is signalled if the returned signals differ from those expected. During the diagnostic routine, the video display is blanked and the video character generator is slowed down. In response to a known sequence of character information supplied thereto, the character generator supplies a corresponding slowed-down stream of bits representing the resulting video; this stream of bits is fed to a slow speed serial port and then to the processor, where an error detecting code is generated from the bit stream and compared to an error detecting code provided by the character generator in response to the input thereto. Similarly, a known data sequence is provided to the disk subsystem where it is treated as if it were data read from the read/write head of the disk drive; for this purpose, the sequence is reversed in order prior to being processed as simulated read data.

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Portola Valley, CA, United States of America

Robert Stephen McNamara