Texas Instruments Corporation

Robert Schaaf

Graham S Tubbs

Martin D Daniels

Ronald Walther

A logic circuit that has a plurality of stages that are driven by a clock source that provides at least 2 clock signals and includes at least a single latch stage located between two of the plurality of stages is configured with field effect transistor technology. The latch stage includes an isolation means for isolating the preceding circuit of the plurality of stages from flow-through of the clocks and signals that are connected to the latch stage, and a latch circuit for storing the data that is applied to the latch stage between clock pulses. A plurality of latch stages can easily be configured as a shift register latch.

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Saugerties, NY, United States of America

Robert Schaaf