Motorola Corporation

Robert S Wrathall

Kevin L McLaughlin

Judy L Sutor

A power MOS switching device is provided wherein certain protective circuits in a control portion thereof remain functional when a ground connection to said control portion is lost.

Power MOS loss of ground protection

A CMOS operational amplifier comprises an input stage for receiving first and second potentials, a bias stage and first and second gain stages. In order to improve the frequency response, capacitors are employed to provide positive feedback. The biasing stage maintains the output in its active region, and avoids the necessity of external biasing.

CMOS high gain amplifier utilizing positive feedback

A CMOS memory cell is provided having separate read and write bit lines and coupling devices associated therewith which provide improved read and write times for the cell. The separate read line is coupled to the cell via a bipolar transistor which supplies increased drive current to the read bit line thereby decreasing the read time. The separate write line is coupled to the cell via a low impedance diode which reduces the write time.

ECL/CMOS memory cell with separate read and write bit lines

A safe operating area circuit in combination with a current sensing circuit is coupled to an input voltage line and has a control line input in which the combination provides a current limited output on an output voltage line in response thereto. Break-points may be selectably established in the current limit curve for the output switching device by means coupling the input and output voltage lines.

Safe operating area circuit and method for an output switching device

A current sensing circuit is disclosed wherein a small portion of a load current is sampled through a sensing resistor and a substantially larger portion of the load current is allowed to bypass the sensing resistor. A first high current vertical MOS transistor is coupled between the load and the ground terminal. A second vertical MOS transistor is coupled in series between the load and ground terminal. The transistors are constructed in a vertical MOS cellular construction whereby the first transistor comprises on the order of three-thousand cells and the second transistor comprises a single cell. A signal is taken across the sensing resistor and may be provided as feedback to a control means driving the first and second transistors for performing a current limiting or constant current function.

Current sensing circuit

An input buffer to which an ECL logic swing is applied through a voltage level shifter to one input of a differential pair of switching devices, the other input of the differential pair being a voltage level shifted by the same amount from an ECL logic reference voltage. The output across a load device coupling one of the switching devices to a collector voltage source drives the input of a conventional inverter coupling a reduced MOS logic voltage supply to the collector voltage source. An output buffer to which a reduced MOS voltage swing logic input is applied to the input of a conventional inverter coupling a reduced MOS logic voltage supply to a collector voltage source. The output of the inverter is applied to one input of a differential pair of switching devices having the other input thereto held at a reference level defined by a voltage divider. The output of the differential pair across a load device coupling one of the switching devices to the collector voltage source is level shifted through another switching device to the circuit output.

ECL MOS Buffer circuits

A voltage reference source is provided which is temperature stable and can be made by standard CMOS processes. The voltage reference can provide an output voltage which is equal to twice the bandgap voltage. The voltage reference circuit uses a differential amplifier which has an output coupled to an additional amplifying stage. Two substrate bipolar transistors are used wherein the emitter current density of one of the transistors is larger than the emitter current density of the other transistor. An additional transistor is inserted between the output of the amplifying stage and the substrate bipolar transistors thereby providing the output voltage of twice the bandgap voltage.

Voltage reference circuit

A solid state current sensing circuit which is useful in a power supply has bipolar as well as CMOS transistors. The bipolar transistors serve as output transistors and have lateral collectors as well as substrate collectors. The lateral collectors of the bipolar transistors are used to sense a portion of the current carried by the substrate collectors. The lateral collectors are connected to a current mirror which provides an output indication of when the output current exceeds a predetermined amount. The entire circuit can be integrated on a single chip.

Solid state current sensing circuit

A digital spark and dwell ignition control system is disclosed. Maximum advance and reference sensors are utilized to determine positions of maximum and minimum possible advance for spark ignition with respect to the position of the engine crankshaft. For each maximum advance sensor pulse a main counter starts sequentially counting clock pulses wherein the maximum count obtained by the counter is related to engine crankshaft speed. The count of the main counter is utilized by a dwell circuit to determine the time prior to the maximum advance pulse at which spark coil excitation should occur. The main counter count also determines several inputs to a read only memory (ROM) circuit whose output controls a rate multiplier. The rate multiplier receives input clock signals and provides selective frequency division for these clock signals in accordance with the ROM output. The output of the rate multiplier is coupled to an accumulator means, preferably a series of counters, which provides an accumulated count corresponding to the rate multiplier output. The accumulated count is utilized to determine the occurrence of spark ignition. Pulse width modulation circuitry receives an analog signal related to the amount of sensed engine vacuum pressure and produces a corresponding periodic digital two state signal which has a duty cycle related to the magnitude of the analog vacuum signal. The periodic two state digital signal is coupled as an input to the ROM which controls the rate multiplier means. In this manner the accumulator count is made to depend upon the magnitude of the analog vacuum signal while a minimum amount of ROM storage space is utilized.

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Tempe, AZ, United States of America

Robert S Wrathall