Ami Semiconductor, Inc.

Semiconductor Components Industries, LLC

Robert S Kirk

James Robert Brown

Shan Mo

Richard A Mosher

One embodiment of the present invention provides for a master or universal base and base tooling which addresses the general purpose Structured ASIC requirements. Another embodiment of the present invention provides for a common set of base tooling from which the master/universal base is created as well as additional custom bases with customized selection and quantity of embedded Platform ASIC functions. Embodiments can utilize conventional Structured ASIC architecture and processing and are compatible with traditional probing and packaging.

Structured ASIC with configurable die size and selectable embedded functions

Structured ASIC device with configurable die size and selectable embedded functions

A dynamic phase adjustment circuit that includes a multi-tap delay line that receives a clock input signal. The multi-tap delay line includes an initial portion that is adjustable, and final portion after the adjustable portion. A number of registers receive the same data. However, the clock signal that causes the registers to sample is received from a corresponding delay element in the final portion of the multi-tap delay line. An edge detect and data decision circuit receives the sampled data values from each of the registers. Sampling resolution is improved over the PLL-based dynamic phase adjustment circuit since the clock signal is delayed using delay elements, which can be made with relatively small delays. Furthermore, the circuit does not contain excessive circuit elements thereby allowing the dynamic phase adjustment circuit to be contained in a small area.

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Mi Wuk Village, CA, United States of America

Robert S Kirk