Altera Corporation

Robert R Bielby

Kerry S Veenstra

Richard G Cliff

Srinivas T Reddy

Rina Raman

Richard Shaw Terrill

Bruce B Pedersen

Joseph Huang

David Wolk Mendel

Christopher F Lane

David Edward Jefferson

Francis B Heile

L Todd Cope

Craig S Lytle

Chiakang Sung

Andreas Papaliolios

Apparatus and methods for configuring a plurality of programmable logic devices which include the steps of providing a source of configuration data and transferring the configuration data directly from the source to each of the programmable logic devices. In some embodiments, the methods permit the programmable logic devices to configure themselves without the intervention of an intelligent host such as a CPU, a microcontroller, or other types of intelligent logic. In other embodiments, configuration data files are used in conjunction with an intelligent host to configure the programmable logic devices. Configuration is performed at power-up or, alternatively, under user or software control.

Programming circuits and techniques for programmable logic

A programmable logic array integrated circuit device includes a plurality of regions of programmable logic disposed on the device in a two-dimensional array of interesting rows and columns. Interconnection conductors are associated with each row and column. The interconnection conductors associated with each row include some that extend continuously along the entire length of the row and some that extend continuously along only the left or right half of the row. To increase the flexibility with which the logic regions can be connected to the row and column conductors, adjacent regions are paired and circuitry is provided for allowing the outputs of each pair to be swapped for driving the row and column conductors. Registers in logic regions can still be used for other purposes when not being used to register the main combinatorial outputs of the logic regions. Many other enhanced features are also provided.

Programmable logic array integrated circuit devices

Programmable logic array intergrated circuit devices

Programmable logic array devices are programmed from programming devices in networks that facilitate programming any number of such logic devices with programs of any size or complexity. The source of programming data and control may be a microprocessor or one or more serial EPROMs, one EPROM being equipped with a clock circuit. Several parallel data streams may be used to speed up the programming operation. A clock circuit with a programmably variable speed may be provided to facilitate programming logic devices with different speed characteristics. The programming protocol may include an acknowledgement from the logic device(s) to the programming data source after each programming data transmission so that the source can automatically transmit programming data at the speed at which the logic device is able to accept that data.

Techniques for programming programmable logic array devices

Programming circuits and techniques for programming logic

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Pleasonton, CA, United States of America

Robert R Bielby