Lsi Logic Corporation

Infocus Corporation

Rgb Spectrum

Jupiter Systems

Oneva, Inc.

Robert Page Gardyne

Stanislav Angelov

Tzvetan Mikov

Anoush Khazeni

Konstantin Timokhin

Chi Ouyang

Anita Lynne Darden Gardyne

Disclosed are systems, media, and methods to provide a coarse qualification process, the coarse qualification process comprising specifying filters and associated ranking characteristics for service providers, the filters comprising at least location, availability, and skills, and resolving practical concerns by displaying candidate service providers based on the filters and ranked based on the ranking characteristics; provide a qualification refinement process, the qualification refinement process comprising modifying the filters and ranking characteristics, applying the refined filters and ranking characteristics, and displaying refined candidate service providers; and provide a service provider booking process, the service provider booking process comprising resolving emotional concerns by viewing service provider video clips, wherein the time to resolve emotional concerns is less than an optimal customer review period, and resolving rational concerns by viewing service provider qualifications.

Method for providing occasional in-home care addressing trust and safety

A method and system for gracefully reducing demands for shared decompression resources required to present multiple video streams concurrently such that their streaming video content is simultaneously available for further processing or display. In particular, it relates to the use of presentation time stamps or incoming frames with reference to a time base dock and a threshold to determine if the decompression resources are falling behind in their ability to process incoming frames in real time. If this occurs then frames are dropped, i.e. discarded without being decompressed, with preference given to dropping incremental frames rather than key frames.

Concurrent decompression of multiple video streams with constrained decompression resources

A method of licensing software to a particular instance of a virtual machine that is being run as part of an Active Directory domain. Since a virtual machine is a simulation of a physical machine, i.e. a computer, it can easily be cloned to produce an exact duplicate. This poses a problem when it is desired to license an instance of software for use only on a particular virtual machine. The technology disclosed allows for software to be licensed for execution only on a particular instance of a virtual machine that is being run as part of an Active Directory domain.

Licensing using a node locked virtual machine

A method and system for gracefully reducing demands for shared decompression resources required to present multiple video streams concurrently such that their streaming video content is simultaneously available for further processing or display. In particular, it relates to the use of presentation time stamps for incoming frames with reference to a time base clock and a threshold to determine if the decompression resources are falling behind in their ability to process incoming frames in real time. If this occurs then frames are dropped, i.e. discarded without being decompressed, with preference given to dropping incremental frames rather than key frames.

Methods and apparatus are provided for efficiently controlling source computers connected to a display system. A control computer is connected to one or more source computers and video output is shown on a display system. A mouse and associated input devices may operate in video processor mode or source computer mode based on mouse x-coordinate and y-coordinate position information. Other modes such as control computer mode are also possible. In particular instances, a mouse and associated input devices operate in source computer mode to control a particular source computer when the mouse pointer position resides within one of the source computer windows. A mode of operation may switch based on a change in mouse position.

Efficient mode switching in a video processor system

A system and method for estimating motion vectors between frames of a video sequence which operates with reduced memory loading latency according to the present embodiment. The motion estimation system includes a motion port pixel processing array according to the present embodiment. The processing array includes a reference block memory array for storing a reference block and a candidate block memory array for storing a candidate block. According to the present embodiment, each of the reference block memory array and candidate block memory array are configured with dual ports to a reference block memory and a search window memory. Each of the reference block memory array and candidate block memory array are further configured to allow dual port loading during the entire initialization sequence, when one or more of either a reference block or candidate block is being loaded into the respective memory array. During initialization or loading, memory elements for each of the reference block and candidate block are loaded in parallel according to the present embodiment. This reduces the clock latency of the initial loading of the memory array as well as subsequent loadings of a new candidate block for each column of the search window. This reduces the loading to half the number of cycles as compared with prior art methods. The present embodiment thus efficiently performs motion estimation with reduced memory array loading latency. The processing array of the present embodiment is also capable of operating in either frame mode or field mode.

System and method for performing motion estimation with reduced memory

A conversion system for converting run-level pairs into variable length codes (VLCs) for purposes of compression, where each run-level pair includes a run and level value derived from scanning blocks of DCT coefficients. Each run value is provided to a programmable memory, which stores a segment address table comprising a list of base addresses, where a base address is included for each valid run value. An adder is provided for adding the base address to the level value of the run-level pair for determining a VLC address. The VLC address is provided to another programmable memory, which stores a table of VLCs, where the VLCs are grouped according to corresponding run values into a plurality of run segments, where each run segment corresponds to one run value and where each group of VLCs are ordered according to level values. The VLCs are preferably organized in ascending order based on the level values. The segment address table preferably includes a corresponding end address for each base address, where the end address is compared with the VLC address for determining an out-of-bounds VLC address. In the event an out-of-bounds value occurs, an escape signal is asserted for instructing the encoding system to use an escape code followed by a fixed length code for each out-of-bounds run-level pair. The conversion system is preferably implemented as a digital logic pipeline within an encoding system, which scans blocks of DCT coefficients and provides corresponding VLCs.

Conversion system using programmable tables for compressing transform

A display system displays a cursor on a monitor using parallel pixels of video data. A hardware cursor processor receives a sequence of clock signals, cursor data, parallel video data arranged in P logical pixels per clock signal, and cursor position data. The hardware cursor processor provides composite video data representative of the cursor data and the video data to a memory. The composite video data is arranged in P logical pixels per clock signal. The hardware cursor processor arranges the cursor data within the P logical pixels per clock signal in response to the cursor position data. The cursor position data includes a position signal HPOS indicative of the horizontal position of the cursor on the screen and includes a preset signal HPRE indicative of the horizontal offset of the cursor. The cursor data is arranged within the P logical pixels of the composite video data to begin at the logical pixel equal to [(HPOS-HPRE) modulus P]. A memory has an input coupled to the output of the hardware cursor processor and has an output for providing a digital video signal indicative of the video data and the cursor data. A digital-to-analog converter has an input coupled to the output of the memory for receiving the digital video signal and has an output coupled to the monitor for providing an analog signal indicative of the cursor data and the video data. The monitor has an input coupled to the output of the digital-to-analog converter for displaying the video data and the, cursor data in response to the analog signal.

Growing community of inventors

Oakland, CA, United States of America

Robert Page Gardyne