Picker International, Inc.

Robert P Hunt

David L Gilblom

Alex Lurye

George C Riser

Martin Shih

An image, such as a radiographic diagnostic image, is increased in brightness by an image intensifer (B). A multiport image distributor (C) receives the image from an convergent lens (34) and distributes it among a plurality of outlet ports (38, 42, 44, 46, 48). A plurality of cameras (D) or other image receiving processing devices are connected with the outlet ports. The image distributor includes a plurality of modules (50A, 50B, 50C), each of which moves a beam splitter (60) into and out of a beam splitting position. In the beam splitting position, each beam splitter divides the received image between two of the output ports. The four modules in the preferred embodiment enable the image to be distributed among up to five output ports.

Multiport light distributor with mechanically inserted and withdrawn

A mode selecting switch (74) selectively interconnects one of an external timing signal from a tachometer (32) and master timing signals from a raster-scan synchronization generator (70) with a sensor line shift timing generator (76). In a time delay and integration mode, the sensor line shift timing generator causes the CCD arrays of an image section (22) and storage section (24) to shift pixel values down the CCD arrays at a rate commensurate with the external timing signal. As a spot of light emanating from a portion of an object moving through an examination region moves along the CCD array, a corresponding pixel charge is shifted through the CCD array at the same speed such that the same pixel charge integrates light from the same spot as it moves the entire length of the CCD array. In a raster-scan mode, the mode selecting switch connects master timing signals from the raster scan sync generator to the sensor line shift timing generator which generates conventional raster-scan timing signals. An output register timing generator (78) generates timing signals under control of an oscillator (80) for output registers (26) such that an output signal is produced that is compatible with EIA-170 television signal standard. Video processing channels (50) and a video synchronization circuit (60) process the output signals to produce a composite video signal.

Dual-mode TDI/raster-scan television camera system

A tachometer (32) monitors the speed of a continuously moving web or article (12). A lens (20) focuses an image of a portion of the web in an examination region (14) on image section (22) of a CCD array. As the web moves, the image moves correspondingly along the image section. A synchronizing circuit (C) adjusts the frequency of the tachometer output signal and uses it in lieu of a fixed frequency oscillator as the master clocking or timing basis for generating clocking pulses for the CCD array. More specifically, the synchronizing circuit generates four phase clocking pulses (.phi.1A-.phi.4A) which shifts lines of CCD data along the image section at the same speed that the image is moving along the CCD section. In this manner, the pixel values integrate light from the same area of the imaged web at each shifted position along the image section. Each line of data from the image section may be shifted at the same rate through an optically light-insensitive storage section (24) and read out serially by shift registers (26) to form a video signal. A quality control analysis circuit (D) monitors the video signal for selected characteristics of the imaged web. Preferably, a record is maintained of the location of flaws and defects noted by the quality analysis circuit.

Time delay and integration of images using a frame transfer CCD sensor

As an object moves along a conveyor (A), a position sensor (B) generates a trigger signal. The trigger signal causes a strobe (14) to emit a high intensity flash of light into an examination region. A lens (20) of a CCD camera (C) focuses light from the examination region both before and during the flash on an image section (24) of a CCD array (22). Subsequent to the flash, a trigger signal delay circuit (16) causes a control circuit (D) to shift the lines of pixel values from the image section into a storage section (26), from the storage section to shift registers (32), and serially from the shift register as a video signal. A video signal channel (52) refines the video signal which is transferred to a computer system (E) which implements a preselected quality control algorithm selected in accordance with a product to be examined. The control circuit includes a pulse generator (74), which provides the appropriate clocking pulses to transfer the data among the image section, the storage section, and the shift registers. A line counter (80 ) counts the lines of pixel values transferred from the image section. When the count corresponds to one field of a video image, the counter causes gates (96, 98) to stop passing clock pulses to the image and storage sections for transferring pixel values therebetween.

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Palo Alto, CA, United States of America

Robert P Hunt