Intel Corporation

Marvell International Limited

Robert N Hasbun

Steven E Wells

David A Edwards

Andrew H Gafken

Richard P Garner

John P Brizek

Christopher J Spiegel

Deborah L See

James R Vogt

Eric J Magnusson

Lance W Dover

Sandeep K Guliani

Paul D Ruby

Mark E Bauer

Sanjay S Talreja

Robert E Larsen

Peter K Hazen

Terry L Kendall

Charles W Brown

Mark J Christopherson

Phillip J Del Pozo, Iii

Jeffrey A Dunlap

William T Reaves

Frank P Janecek

Daniel H Leemann

Collin Ong

Albert Fazio

Rodney R Rozman

Kurt B Robinson

Mamun Ur Rashid

Mark P Leinwander

Richard D Pashley

Johnny Javanifard

Sherif R Sweha

Greg Atwood

Peter J Ruscito

Mark D Winston

David M Brown

Joann Lam

Terry D West

Stephen Wells

Geoff Gould

Steven S Barbarich

Sara Domonkos

Asad Faizi

George Blanchard

Glen Hawk

Gary J Gallagher

In one embodiment, the present invention includes a method to initiate updating of a second portion of a system if a value indicates that the system is in a trusted state. In such an embodiment, a first portion of the system may validate updated code before the second portion of the system is updated. In one such embodiment, the first portion may be an applications portion and the second portion may be a communications portion of a wireless device.

Updating code with validation

A biometric-based security circuit in which the user database, processor, and biometric map generation functions are all located on the same integrated circuit whose secure contents are inaccessible from external to the integrated circuit. Biometric data, such as a fingerprint, retina scan, or voiceprint, is taken from a user requesting access to restricted resources. The biometric data is transferred into the integrated circuit, where it is converted to a biometric map and compared with a database of biometric maps stored in a non-volatile memory in the integrated circuit. The stored maps represent pre-authorized users, and a match triggers the security circuit to send a signal to a host processor authorizing the host processor to permit the requesting user access to the restricted resources. The integrated circuit essentially serves as a write-only memory for the secure data, because the secure data and security functions in the integrated circuit are not directly accessible through any pin or port, and therefore cannot be read or monitored through a dedicated security attack. A second non-volatile memory, accessible from external to the integrated circuit, can also be provided in the integrated circuit for holding non-secure data. This second memory has its own interface port, and is isolated from the security-related functions and memory so that secure and non-secure functions are physically isolated from each other and cannot be modified to overcome that isolation.

Biometric-based authentication in a nonvolatile memory device

Methods of allocating, writing, reading, de-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage architecture are described. A method of reliably re-allocating a first object includes the step of storing a location of a first object in a first data structure. A location of the first data structure is stored in a second data structure. A duplicate of the first object is formed by initiating a copy of the first object. An erase of the first object is initiated. A write of a second object to the location of the first object is then initiated. The duplicate object is invalidated. The status of copying, erasing, and writing is tracked. The copy status, erase status, write status, and a restoration status are used to determine a recovery state upon initialization of the nonvolatile memory. The duplicate object is invalidated, if the writing status indicates that the writing of the second object has been completed. The first object is erased, if a restoration status indicates copying of the duplicate object was initiated but not completed. The erasing of the first object is completed, if the erase status indicates that erasure of the first object is not completed. A restoration of the duplicate object to the location of the first object is initiated, if the copying status indicates that copying of the first object was completed. The copying of the duplicate object is tracked as a restoration status.

Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture

A method and device for providing hidden storage in non-volatile memory. A memory device is disclosed comprising a main flash array. A hidden storage area is connected to the main flash array. The hidden storage area can not be accessed without a valid password according to the present memory device.

Method and device for providing hidden storage in non-volatile memory

Methods for storing data in an erasable nonvolatile memory are described herein. In one embodiment, an example method includes allocating a space within a block of an erasable nonvolatile memory for an object, wherein the allocated space is within a single block of the erasable nonvolatile memory and the allocated space includes a plurality of areas capable of storing multiple instances of the object, storing a first instance of the object in one of the areas within the allocated space, storing a superseding second instance of the object in another one of the areas within the allocated space without erasing any of the allocated space, and for each of the first and second instances of the object, storing status information corresponding to the respective instance of the object within the allocated space which is within the single block of the erasable nonvolatile memory.

Increased reliability of data stored on flash memory in applications sensitive to power-loss

A method wherein a special programming mode of a memory is entered. The special programming mode disables internal verification by the memory. The memory includes automation circuitry for program verification. A plurality of words is programmed into the memory without the memory performing internal program verification. A host processor verifies external to the memory the programming of the plurality of data words into the memory. The special programming mode is exited and internal program verification by the memory is enabled. An apparatus is also described having a host processor and a memory with special programming mode circuitry.

Method and apparatus including special programming mode circuitry which disables internal program verification operations by a memory

A method wherein a special programming mode of a memory is entered. The special programming mode disables internal verification by the memory. The memory includes automation circuitry for program verification. A plurality of words is programmed into the memory without the memory performing internal program verification. Hashing is performed with respect to the plurality of data words to generate a first hash value. The host processor compares the first hash value with a second hash value to see whether the first and second hash values are the same or different. The special programming mode is exited and internal program verification by the memory is enabled. An apparatus is also described having a host processor and a memory with special programming mode circuitry.

Special programming mode with hashing

A memory module including a flash EEPROM memory array designed to be joined to a memory bus of a computer, BIOS processes including system status test processes stored in the array, diagnostic processes stored in the array to provide data indicating malfunctions in the computer, accessing processes stored in the array for calling the system status test processes and the diagnostic processes even though the computer fails to boot, and communication processes stored in the array for transferring results produced by the system status test processes and the diagnostic processes for use in servicing the computer.

Method and apparatus for providing improved diagnostic functions in a computer system

Methods of allocating, writing, reading, de-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage architecture are described. In one embodiment, a method of reliably re-allocating a first object stored within a block erasable nonvolatile memory includes the step of allocating space for a second object. A write of the second object is initiated and the writing of the second object is tracked. In another embodiment, a method of re-allocating a first object stored within a block erasable nonvolatile memory includes the step of invalidating the first object, if the first object has an unreliable type of recovery level. Space is allocated for the second object. A write of the second object is initiated and the writing of the second object is tracked. In another embodiment, a method of reliably re-allocating a first object stored within the block erasable nonvolatile memory includes the step of allocating space for the second object. A write of the second object is initiated and the writing of the second object is tracked. The first object is invalidated after completion of writing the second object, if the first object has a reliable type of recovery. In one embodiment, the first object resides within a first portion of nonvolatile memory and the instructions for performing the described methods reside in a second portion of nonvolatile memory. The first and second portions can reside within a same nonvolatile memory such as a symmetrically blocked flash electrically erasable programmable read only memory.

A method of moving a boundary in a nonvolatile memory is disclosed. The method comprises identifying a boundary location in the nonvolatile memory. The boundary location comprises a position between a first block of a first type and a second block of a second type. The method also comprises allocating objects from a last block of the first type to a second block of the first type. Additionally, the method comprises erasing the last block of the first type.

Method and apparatus to permit adjustable code/data boundary in a nonvolatile memory

Methods of reliably allocating, writing, reading, de-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage architecture are described. Allocation, writing, reading, de-allocating, re-allocating, and reclamation are handled by a memory manager. The memory manager tracks the progress of each process during execution in order to detect whether a selected process was interrupted for purposes of recovery. The nonvolatile memory is recovered to a known state during initialization. Initialization includes the step of determining a recovery state from a recovery state lookup table. A selected recovery process is selected in accordance with the recovery state lookup table. A restart level for the selected process is determined from a corresponding restart state lookup table. The selected process is then restarted at the restart level. In one embodiment, a method of managing a nonvolatile memory includes the step of identifying an interrupted process from at least one of an allocation, a reclamation, a configuration header reclaim, and a re-allocation process initiated on the nonvolatile memory. A recovery process is selected for the interrupted process. An entry point into the recovery process is determined. The selected recovery process is then restarted at the entry point.

Methods of reliably allocating, de-allocating, re-allocating, and reclaiming objects in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture

A method for storing data in a memory partitions the memory into a plurality of partitions. A primary logical identifier is stored in the memory to identify each partition of data. A secondary identifier number is also stored in the memory to identify each partition of data, the secondary logical identifier redundant to the primary logical identifier. A primary logical identifier is used to locate at least one partition of data stored in the memory after receiving a requested partition number identifying a requested partition. The secondary logical identifier is used to compute a value to further identify the at least one partition of data. The value is computed by performing a logical AND operation between the primary logical identifier and the secondary logical identifier. This value is compared with the requested partition number. A method of detecting column short bit locations in a memory arranged as m words of n bits of memory. First a written stripe of data is written to the memory, each bit of the written stripe of data having a known value. The written stripe of data is read from memory. The written stripe of data is compared to the read stripe of data. The bit errors are located by locating a position of each inverted known value in the read stripe of data.

Method and apparatus for error management in a solid state disk drive

Growing community of inventors

Shingle Springs, CA, United States of America

Robert N Hasbun