Growing community of inventors

Portland, OR, United States of America

Robert Menezes

Average Co-Inventor Count = 7.07

ph-index = 8

The patent ph-index is calculated by counting the number of publications for which an author has been cited by other authors at least that same number of times.

Forward Citations = 161

Robert MenezesSasikanth Manipatruni (29 patents)Robert MenezesAmrita Mathuriya (29 patents)Robert MenezesRajeev Kumar Dokania (29 patents)Robert MenezesRamamoorthy Ramesh (29 patents)Robert MenezesYuan-Sheng Fang (17 patents)Robert MenezesGaurav Thareja (14 patents)Robert MenezesRafael Rios (12 patents)Robert MenezesIkenna Odinaka (12 patents)Robert MenezesNeal Reynolds (5 patents)Robert MenezesGuarav Thareja (1 patent)Robert MenezesRobert Menezes (29 patents)Sasikanth ManipatruniSasikanth Manipatruni (400 patents)Amrita MathuriyaAmrita Mathuriya (258 patents)Rajeev Kumar DokaniaRajeev Kumar Dokania (239 patents)Ramamoorthy RameshRamamoorthy Ramesh (88 patents)Yuan-Sheng FangYuan-Sheng Fang (17 patents)Gaurav TharejaGaurav Thareja (57 patents)Rafael RiosRafael Rios (152 patents)Ikenna OdinakaIkenna Odinaka (72 patents)Neal ReynoldsNeal Reynolds (7 patents)Guarav TharejaGuarav Thareja (1 patent)
..
Inventor’s number of patents
..
Strength of working relationships

Company Filing History:

1. Kepler Computing Inc. (29 from 268 patents)


29 patents:

1. 12308837 - Multiplier with non-linear polar material

2. 12126339 - Apparatus with selectable majority gate and combinational logic gate outputs

3. 12107579 - Method for conditioning majority or minority gate

4. 12088297 - Majority gate based low power ferroelectric based adder with reset mechanism

5. 11863183 - Low power non-linear polar material based threshold logic gate multiplier

6. 11764790 - Majority logic gate having paraelectric input capacitors coupled to a conditioning scheme

7. 11742860 - Fabrication of a majority logic gate having non-linear input capacitors

8. 11711083 - Majority gate based low power ferroelectric based adder with reset mechanism

9. 11705906 - Majority logic gate having ferroelectric input capacitors and a pulsing scheme coupled to a conditioning logic

10. 11616507 - Ferroelectric based latch

11. 11539368 - Majority logic gate with input paraelectric capacitors

12. 11502691 - Method for using and forming low power ferroelectric based majority logic gate adder

13. 11451232 - Majority logic gate based flip-flop with non-linear polar material

14. 11418197 - Majority logic gate having paraelectric input capacitors and a local conditioning mechanism

15. 11394387 - 2-input NAND gate with non-linear input capacitors

Please report any incorrect information to support@idiyas.com
idiyas.com
as of
10/4/2025
Loading…