Sun Microsystems, Inc.

Robert Mark Stano

Shawn F Storm

Bradley W Hoffert

Abraham E Rindal

Horace Arlen Olive, Jr

Kenneth A Gross

Brad W Hoffert

Jim Weatherford

Andreas Bechtolshein

A monitor interface cable for transmitting display data and command data between a computer system and a display monitor preferably including a microcontroller. The monitor interface cable enables both display and command data to be transmitted simultaneously from the computer system to the display monitor.

Synchronous serial display monitor control and communications bus interface

A monitor interface cable for transmitting display data and command data between a computer system and a display monitor preferably including a microcontroller. The monitor interface cable enables both display and command data to be transmitted simultaneously from the computer system to the display monitor. Inside the computer system, data containing the commands written to a particular memory location in a video buffer card is applied to various signal lines located in the monitor interface cable. These signal lines are coupled to the microcontroller located in the display monitor which receives the commands and performs various controlling functions in response. Status information in the form of a command is transmitted back across a second signal line to the computer system where various software programs including drivers receive and process the status information. Display data is simultaneously transmitted over other signal lines also located in the monitor interface cable.

Synchronous serial display monitor control and communications bus

An apparatus and method for processing display data in multi-pixel sections which also tracks and maps a cursor in single pixel increments is disclosed. A video buffer card receives display data and generates display control data for a multi-pixel section of display frame, and cursor display information including cursor enable information, cursor color selection information, cursor color and blending information, and X and Y cursor location information. Additionally, the current horizontal and vertical location of the multi-pixel section of the display data is tracked and used in combination with the cursor X and Y location information to calculate an offset that is used to replace certain portions of the display data with cursor color information. The video buffer card also supports a blending operation which provides a blend of the cursor foreground and background colors with the displayed image colors.

High speed display system having cursor multiplexing scheme

A method and apparatus is disclosed for interleaving the transfer of pixel data from a dual bank frame buffer to a memory display interface. The interleaved transfer of pixel data to the memory display interface enables upgrade of existing memory display interface designs to higher density VRAM chips in order to increase the capacity of the frame buffer.

Growing community of inventors

Sunnyvale, CA, United States of America

Robert Mark Stano