Unisys Corporation

Other

Robert Marion Malek

Mitchell A Bauman

Kelvin S Vartti

David R Johnson

Charles R Caldarale

James R McBreen

Roger Lee Gilbertson

Hans Christian Mikkelsen

David P Williams

Carl R Crandall

Lewis A Boone

James L Federici

Stephen Sutter

Peter John Hancock

Souvik Das

David A Maahs

Jerome J Witalka

Ravi Kumar Rao

Manish Ranjan Mahanta

A method and system for providing a plurality of host systems shared access to data files from a file server. The method includes monitoring a control file for updates, the control file located within a corresponding host directory located within the file server; receiving a request for access to a data file stored on the file server, the access request being written to the control file, the access request including a requested data file operation; performing the requested data file operation in response to the control file being updated with the access request; creating a status file in the host directory in which the requested data file operation was performed upon completion of the requested data file operation; writing status data in the status file, the status data including a result of the performance of the requested data file operation; and allowing access to the host directory in which the requested data file operation was performed in response to the status data being written to the status file.

Method and system for low overhead control/status handshake for remote shared file server

Updating timers of central processing units (CPUs) in a multiprocessor apparatus involves the repeated performance of update operations by a device that is coupled to the CPUs via a memory interface. The operations include selecting one of the plurality of CPUs and determining an offset value that estimates a delay time to process a timer update at the selected CPU. A corrected timer value of the selected CPU is determined based on the offset value and a reference time. The corrected timer value is written to a cache line of the selected CPU to cause the selected CPU to update the timer of the selected CPU.

Method and apparatus for synchronizing central processing units in a multiprocessor apparatus

A method of and apparatus for improving the scheduling efficiency of a data processing system using the facilities which maintain coherency of the system's level cache memories. These efficiencies result from monitoring the cache memory lines which indicate invalidation of a cache memory entry because of a storage operation within backing memory. This invalidity signal is utilized to generate a doorbell type interface indication of a new application entry within the work queue.

Use of a cache coherency mechanism as a doorbell indicator for input/output hardware queues

A method of and apparatus for improving the efficiency of a data processing system employing multiple dayclocks using the facilities which maintain coherency of the system's level cache memories. These efficiencies result from dedicating a separate individual dayclock to each of the multiple instruction processors within the data processing system thereby decreasing access time and user queuing. These individual dayclocks are each incremented at one microsecond intervals. However, these individual dayclocks require periodic synchronization to avoid system level time-tagging problems. This synchronization occurs at 20 microsecond intervals using the cache coherency maintenance hardware of the system.

Use of a cache ownership mechanism to synchronize multiple dayclocks

A fluid assisted wedging and compacting device for the installation of underground cable that includes a blade with a cutting edge, two cutting faces a toe, a shoe, a cable feed tube, a pair of deflectors, a pair of grooves and a plurality of high pressure water jet nozzles. The blade is designed so that the deflectors and grooves are positioned in a vertical orientation on the lower half of the cutting faces of the blade. During use, the deflectors on the cutting faces deflect soil creating a soil free zone preventing blockage of the nozzles and allowing the water pressure from the nozzles to effectively aid the blade in cutting through the soil.

Fluid assisted ground wedging device

Data transfer scheme wherein data transfer rates can be effectively doubled with no increase in the clock speed of the interface. This is accomplished by allowing more than one data transfer to occur on a single clock cycle. This transfer scheme increases the transfer rate of the interface by multiplexing two data groups on the same interface. These data groups are transmitted from a source phase latch at approximately the same time as two strobe signals which have low skew with respect to the data. The master and slave strobe signals are logically combined to create an even latch enable signal and an odd latch enable signal that are used to latch and de-multiplex the multiplexed data groups at a receiving end of a pair of flow-though source synchronous latches.

Source synchronous transfer scheme for a high speed memory interface

Method of and apparatus for bandwidth control of transfers via a bi-directional interface

A method and apparatus for efficiently reading a day clock and storing the value into main storage. An advantage is that the memory storage command can request the main storage control to read a current day clock value and store the value into a main storage location specified by the requesting processor while allowing the requesting processor to continue processing other commands. A further advantage is that the requesting processor does not have to wait for the return of a day clock value or the generation of a main storage write request which may reduce the number of main storage I/O bus requests and bus transfer cycles over that normally required to transfer the day clock value to the requesting processor and then back to main storage.

Processor command for prompting a storage controller to write a day

A network input/output processing system for sending and receiving messages between a large scale computer system and associated communications networks. Executive operating system services provide access to a control table, an input queue, and an output queue stored in the computer system's main memory. A network input/output processor responds to requests by application programs, through a communications program, for receiving input from and sending output to a network, concurrently with requests to communicate with directly attached peripheral devices such as disk drives, tape drives, and printers. The network input/output processor receives initialization, reset, and termination requests via the control table. Requests to receive input are received from the input queue. Input data is stored into buffers as directed by the input request. Requests to send output are received from the output queue. Output data is read from the buffers as directed by the output request. Executive operating system services provide for control of input data transfers and output data transfers. Special purpose Instruction Processor instructions provide the capability to build control programs for processing input and output messages used by the network input/output processor to effect message transfers, thereby minimizing host instruction pathlength for communications I/O. The system architecture minimizes internal data copy between processes by using transferable buffers as communications buffers.

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White Bear Lake, MN, United States of America

Robert Marion Malek