Texas Instruments Corporation

The University of Texas System

Other

Samsung Electronics Co., Ltd.

University of North Texas

Robert M Wallace

Glen D Wilk

Bruce E Gnade

Yi Wei

John Mark Anthony

Richard A Stoltz

Douglas A Webb

Steven A Henck

Scott Robert Summerfelt

Mark Stephen Rodder

Luigi Colombo

Monte A Douglas

Jules D Levine

Wei-E Wang

Chi-Cheong Shen

Sunil V Hattangady

Robert H Taylor

Peijun Chen

Rodney S Ruoff

Xiaoye Qin

Chih-Chen Cho

Dim-Lee Kwong

Alan C Seabaugh

Shaoping Tang

Paul C McIntyre

William L Warren

Manuel A Quevedo-Lopez

Yasutoshi Okuno

Kenneth C Harvey

Marvin Wayne Cowens

George A Brown

S Charles Baber

Karel J Vanheusden

Daniel M Fleetwood

Roderick A Devine

Jan Paul Van Der Wagt

Kyeongjae Cho

Wiley P Kirk

Berinder P S Brar

Suklyun Hong

Leo B Archer

Mohamed El Bouanani

Alma J Larkin, Iii

John W Pattschull

Dean N Mize

Douglas A Buol

Mark Anthony

Yifan Nie

Sunil V Hanttangady

A metal oxide semiconductor field effect transistor (MOSFET) includes a substrate having a source region, a drain region, and a channel region between the source region and the drain region, the substrate having an epitaxial III-V material that includes three elements thereon, a source electrode over the source region, a drain electrode over the drain region, and a crystalline oxide layer including an oxide formed on the epitaxial III-V material in the channel region, the epitaxial III-V material including three elements.

Metal oxide semiconductor field effect transistor with crystalline oxide layer on a III-V material

Method of forming crystalline oxides on III-V materials

A Schottky barrier device is provided herein that includes a TMD layer on a substrate, a graphene layer on the TMD layer, an electrolyte layer on the TMD layer, and a source gate contact on the electrolyte layer. A drain contact can be provided on the TMD layer and a source contact can be provided on the graphene layer. As ionic gating from the source gate contact and electrolyte layer is used to adjust the Schottky barrier height this Schottky barrier device can be referred to as an ionic control barrier transistor or 'ionic barristor'.

Ionic barristor

A method and semiconductor device for synthesizing graphene using ion implantation of carbon. Carbon is implanted in a metal using ion implantation. After the carbon is distributed in the metal, the metal is annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the surface of the metal. The metal/graphene surface is then transferred to a dielectric layer in such a manner that the graphene layer is placed on top of the dielectric layer. The metal layer is then removed. Alternatively, recessed regions are patterned and etched in a dielectric layer located on a substrate. Metal is later formed in these recessed regions. Carbon is then implanted into the metal using ion implantation. The metal may then be annealed and cooled in order to precipitate the carbon from the metal to form a layer of graphene on the metal's surface.

Synthesizing graphene from metal-carbon solutions using ion implantation

A method is provided, the method comprising operating a field emitter array (FEA) to generate at least one of a high electric field and a high electron flux, and exposing the field emitter array (FEA) to at least one gas. The method further comprises generating at least one radical species from the at least one gas exposed to the at least one of the high electric field and the high electron flux.

Method for using field emitter arrays in chemical and biological hazard mitigation and remediation

A field effect semiconductor device comprising a high permittivity silicate gate dielectric and a method of forming the same are disclosed herein. The device comprises a silicon substratehaving a semiconducting channel regionformed therein. A metal silicate gate dielectric layeris formed over this substrate, followed by a conductive gate. Silicate layermay be, e.g., hafnium silicate, such that the dielectric constant of the gate dielectric is significantly higher than the dielectric constant of silicon dioxide. However, the silicate gate dielectric may also be designed to have the advantages of silicon dioxide, e.g. high breakdown, low interface state density, and high stability. The present invention includes methods for depositing both amorphous and polycrystalline silicate layers, as well as graded composition silicate layers.

High permittivity silicate gate dielectric

This invention pertains generally to forming thin oxides at low temperatures, and more particularly to forming uniformly thick, thin oxides. We disclose a low temperature method for forming a thin, uniform oxideon a silicon surface. This method includes providing a partially completed integrated circuit on a semiconductor substratewith a clean, hydrogen terminated or atomically flat, silicon surface; and stabilizing the substrate at a first temperature. The method further includes exposing the silicon surface to an atmosphereincluding ozone, while maintaining the substrateat the first temperature. In this method, the exposing step creates a uniformly thick, oxide film. This method is suitable for room temperature processing.

Low temperature method for forming a thin, uniform oxide

A method of processing a substrate is disclosed. The method includes depositing a dielectric layer having a metal oxide on a substrate. A portion of the dielectric layer is removed to form a dielectric structure, thereby exposing a surface of the substrate. For example, the dielectric layer may be patterned using standard photolithographic techniques and etching. An oxide layer is then formed on the exposed surface of the substrate. The oxide layer may be formed using ozone that is generated using ultraviolet radiation. After the oxide layer is formed, it is removed using an etching process.

Method for removing contaminants on a substrate

An embodiment of the instant invention is a method of forming a electrically conductive structure insulatively disposed from a second structure, the method comprising: providing the second structure; forming the electrically conductive structure of a material (stepof FIG.) that remains substantially conductive after it is oxidized; forming an electrically insulative layer (stepof FIG.) between the second structure and the conductive structure; and oxidizing the conductive structure by subjecting it to an ozone containing atmosphere for a duration of time and at a first temperature.

Method of forming metal oxide gate structures and capacitor electrodes

CMOS and BiCMOS structures with a silicate-germanate gate dielectric on SiGe PMOS areas and Si NMOS areas plus HBTs with Si&mdash;SiGe emitter-base junctions.

Gate structure and method

A method for forming a thermal silicon nitride on a semiconductor substrate is disclosed. This method allows formation of thermal silicon nitride that is thick enough for a FET gate dielectric, but has a low thermal budget.

Lower temperature method for forming high quality silicon-nitrogen dielectrics

A protective cover ( ) for an optical device, such as a spatial light modulator or an infrared detector or receiver. The cover ( ) has an optically transmissive window ( ), which has a coating ( ) on one or both of its surfaces. The coating ( ) is made from a halogenated material, which is deposited to form a chemical bond with the surface of the window ( ).

Fluorinated coating for an optical element

Growing community of inventors

Richardson, TX, United States of America

Robert M Wallace