Agilent Technologies, Inc.

Robert M Thelen

Bradley K Davis

Michael Clinton Allyn

In accordance with the present invention, a magneto-resistive head read amplifier circuit is provided which can be incorporated into a magnetic reader for reading information stored in magnetic form on a storage medium. The magneto-resistive head read amplifier of the present invention incorporates an inductor in the bottom current drain of the head read amplifier circuit which reduces or eliminates noise generated by the bottom current source transistor of the head read amplifier circuit. In accordance with a first embodiment of the present invention, the magneto-resistive head read amplifier is a single-polarity head read amplifier circuit which utilizes a bias current having a particular polarity. In accordance with a second embodiment of the present invention, the magneto-resistive head read amplifier is a dual-polarity head read amplifier circuit capable of operating with bias currents of opposite polarity. Both embodiments of the present invention preferably utilize a common mode feedback circuit and a differential feedback circuit which set the operating point of the head read amplifier circuits. The differential feedback circuit nulls the differential output voltage of the head read amplifier circuit and the common mode feedback circuit sets the minimum bias current for the magneto resistor. In the dual-polarity head read amplifier circuit, switching logic is utilized to enable the polarity of the bias current to selected.

Magneto-resistive head read amplifier

The present invention provides a write driver circuit for use in a magnetic read/write system for writing information to a magnetic storage medium. In accordance with a first embodiment of the present invention, the write driver circuit comprises a variable common mode circuit component for enabling the common mode output voltage of the write driver circuit to be varied and/or set to a preselected value. In accordance with a second embodiment of the present invention, the write driver circuit comprises a variable damping resistance circuit component for enabling the damping resistance of the write driver circuit to be varied and/or set to a preselected value in order to optimize write current rise time and overshoot. The write driver circuit may comprise both the variable common mode circuit component and the variable damping resistance component to enable both the common mode output voltage and the damping resistance to be varied and set to preselected values in order to optimize the performance of the write driver circuit. In accordance with another embodiment of the present invention, a relatively high-power write driver circuit is fabricated using a fabrication process normally used for fabricating relatively low-power write driver circuits. in accordance with this embodiment, the current sources of the write driver circuit are each comprised of a plurality of transistors connected in series in cascode configurations such that the voltage drop across any one of the transistors of the cascode configurations is limited to meet the requirements. of the fabrication process.

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Ft. Collins, CO, United States of America

Robert M Thelen