Hughes Electronics Corporation

Digital Communications Corporation

Robert L Richmond

Paul Francis Wyar

Yimin Jiang

Richard Clewer

Farhad Verahrami

Theodore C Hockey

An approach for identifying a particular carrier among a plurality of carriers in a satellite communication system is disclosed. A transmitter multiplies an encoded signal by a prescribed periodic sequence to form a watermarked signal and transmits the watermarked signal associated with a particular carrier over a communication channel. A receiver tunes to one of the carriers and extracts a data sequence from the one carrier. The receiver multiplies the data sequence with the prescribed periodic sequence to form another watermarked signal and determines whether the watermarked signals match.

Robust carrier identifying method and apparatus for bandwidth-on-demand (BOD) system

A redundant system, such as a redundant-modem system, having a plurality of similar components capable of operating independently of each other. At least one of the components serves as a spare component. The system further includes a plurality of switches connected to the inputs and outputs of the components such that the inputs and outputs of each of the components may be rerouted through the component operating as the spare. When operating as a spare, a component monitors status information received from the other components and detects when one of the other components has failed. When one of the components has failed, the component acting as a spare controls the switches such that the spare component (,) replaces the failed component.

Complexity reduction system and method for integrated redundancy switchover systems

An application-specific integrated circuit (ASIC) for performing a selected one of a plurality of programmable functions on one or more input signals. The ASIC includes a plurality of component circuits (21-28), each for performing a predetermined component function (F.sub.1 -F.sub.8) on a signal supplied thereto, a plurality of component routers (31-36) for selectively coupling together the plurality of component circuits (21-28), and a control processor interface (40) for receiving control signals that control the plurality of component routers (31-36) such that selected component circuits (21-28) are coupled together in a manner by which the predetermined component functions (F.sub.1 -F.sub.8) of the selected component circuits are performed on the input signal in an order necessary to accomplish the selected one of the plurality of programmable functions. An application of the above-described circuit to a signal processing ASIC useful in stand-alone satellite modems is also disclosed.

Application-specific integrated circuits having programming functions

An on-line channel monitor, for measuring E.sub.b /N.sub.O, measures the quality of a communication channel while the channel is in use. The channel monitor employs a soft-decision demodulator so as to compare analog signal levels of an AGC compensated signal in a demodulator with the desired signal level. Deviations, termed pseudo-errors, are counted and the number of counts integrated. The result is employed to drive a meter calibrated in terms of E.sub.b /N.sub.O.

On-line channel quality monitor for a communication channel

The digital demodulator produces an information bearing analog signal which is controlled in peak-to-peak amplitude. The signal is coupled to a soft-decision demodulator which provides a multi-bit output representative of magnitude (polarity and amplitude) of the analog signal at a rate determined by the symbol clock derived from the digital demodulator. Logic means produces a logic signal of a first or second type in response to selected multi-bit outputs of the soft-decision demodulator. A logic output of the first type is produced if either the multi-bit output represents an analog signal of one polarity and amplitude greater than a predetermined amplitude, or if the multi-bit output represents an analog signal of the other polarity and amplitude less than an equal predetermined amplitude of the other polarity. The logic output is coupled to an integrating means which produces a control signal representative of deviations of the logic signal of the first type from 50% duty cycle. The deviation from 50% duty cycle determines the amplitude of the DC offset, and the polarity of the deviation determines the polarity of the offset. The output of the detector can be used in a feedback loop to eliminate the DC offset by coupling the control signal to a summing junction, to which is also coupled the analog signal.

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Gaithersburg, MD, United States of America

Robert L Richmond