Hewlett-packard Development Company, L.P.

Tandem Computers Incorporated

Alterg, Inc.

Compaq Computer Corporation, Inc.

Tibion Corporation

Robert L Jardine

Robert W Horst

William F Bruckert

James R Smullen

David J Garcia

James S Klecka

David L Bernick

Murali Basavaiah

Philip R Manela

Paul Del Vigna, Jr

Thomas J Kondo

Shannon J Lynch

Pankaj Mehra

Edith Merle Arnold

Kern S Bhugra

Jonathan Smith

Marcelo Moraes De Azevedo

Karoor S Krishnakumar

Larry D Reeves

Graham B Stott

Richard M Collins

William P Bunton

Hossein Moiin

Srinivasa D Murthy

Russell Mark Rector

James Stevens Klecka

A Richard Zacher

Sachin U Naik

Jeff Sprouse

Thomas A Heynemann

Tatsuhiro Torii

Patrick H Barnes

Garry Easop

The invention relates to embodiments of methods for extending a subject-controllable range of joint motion, and for increasing subject control of joint movement within a range of motion. Embodiments include fastening a powered device around a joint so as to be able to control the joint, allowing the subject to move the joint within a range of volitional motion, and then engaging the powered device to support movement of the joint into an expanded, rehabilitative range. In some embodiments, the device supports joint movement by substantially providing the force to move the joint beyond the volitional boundary. In other embodiments, supporting movement includes the subject substantially providing the force, and the device allowing movement only in a desired direction. The invention further relates to a system for increasing the functional capability of a joint by implementing embodiments of the method. By such methods and system, rehabilitation is accomplished both by building strength, and training neural pathways.

Therapeutic method and device for rehabilitation

A foot pad device includes a foot pad, force sensors that provide force data, sensor electronics coupled to the force sensors, and a processor. The foot pad includes a ball region configured to be located under a ball of the foot of the user or a heel region configured to be located under a heel of the foot of the user. At least a portion of the force sensors is located in the ball region or the heel region of the foot pad. The sensor electronics include a flexible circuit with force sensor connection paths adapted to transmit force data from the force sensors and are configured to condition the force data to be within a conditioned force data range. The processor is configured to calculate a weight value based on the conditioned force data, a gain value, and an offset value.

Foot pad device and method of obtaining weight data

A foot pad device and a method of obtaining weight data from a force sensor in a foot pad worn by a user engaging in a footstep, including placing the force sensor under the ball of the foot of the user and/or the heel of the foot of the user; receiving an entered patient weight value for the user; collecting force data from the force sensor; calculating a weight value based on the collected force data and a scaling and/or offset parameter; comparing the calculated weight value to the entered patient weight value; comparing the calculated weight value to zero; adjusting the scaling and/or offset parameter; and repeating the steps periodically. The method may include comparing the collected force data to a functionality indication range, flagging the force sensor if the collected force data is outside the functionality indication range, and disregarding force data from the flagged force sensor.

In an implementation of time of day response, time logic executed by each processor element of a logical processor generates a logical time in response to a time of day request. The logical time is generated to approximate the actual time such that each processor element of the logical processor returns the same logical time.

Time of day response

An actuator system for extending and flexing a joint, including a multi-motor assembly for providing a rotational output, a rotary-to-linear mechanism for converting the rotational output from the multi-motor assembly into an extension and flexion of the joint, and a controller for operating the actuator system in several operational modes. The multi-motor assembly preferably combines power from two different sources, such that the multi-motor assembly can supply larger forces at slower speeds ('Low Gear') and smaller forces at higher speeds ('High Gear'). The actuator has been specifically designed for extending and flexing a joint (such as an ankle, a knee, an elbow, or a shoulder) of a human. The actuator system may, however, be used to move any suitable object through any suitable movement (linear, rotational, or otherwise).

Actuator system with a multi-motor assembly for extending and flexing a joint

A method and system of copying a memory area between processor elements for lock-step execution. At least some of the illustrative embodiments may be a method comprising executing duplicate copies of a first program in a first processor of a first multiprocessor computer system and in a first processor of a second multiprocessor computer system (the executing substantially in lock-step), executing a second program in a second processor element of the first multiprocessor computer system (the first and second processors of the first multiprocessor computer system sharing an input/output (I/O) bridge), copying a memory area of the second program executing in the second processor element of the first multiprocessor computer system to a memory of a second processor element in the second multiprocessor computer system while the duplicate copies of the first program are executing in the first processor elements, and then executing duplicate copies of the second program in the second processors in lock-step.

Method and system of copying a memory area between processor elements for lock-step execution

Techniques for routing data packets in a networked system. Specifically, a network system and methods of arbitrating data packets in a network system are provided. Switching devices are configured to receive one or more data packets, wherein each of the one or more data packets includes a respective source identification. The source identifications are compared to a source identification history mechanism, and the routing order of the data packets is determined based on the comparison.

Method and apparatus for arbitrating data packets in a network system

Aligning execution point of duplicate copies of a user program by exchanging information about instructions executed. At least some of the exemplary embodiments may be a method of operating duplicate copies of a user program in a first and second processor, allowing at least one of the user programs to execute until retired instruction counter values in each processor are substantially the same, and then executing a number of instructions of each user program. Of the instructions executed, at least some of the instructions are decoded and the inputs of each decoded instruction determined (the decoding substantially simultaneously with executing in each processor). The method further may include exchanging among the processors addresses of decoded instructions and values indicative of inputs of the decoded instructions, determining that an execution point of the user program in the first processor lags with respect to an execution point of the user program in the second processor using at least the addresses of the decoded instructions, and advancing the first processor until the execution point within each user program is substantially aligned.

Method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed

A method and system of copying memory from a source processor to a target processor by duplicating memory writes. At least some of the exemplary embodiments may be a method comprising stopping execution of a user program on a target processor (the target processor coupled to a first memory), continuing to execute a duplicate copy of the user program on a source processor (the source processor coupled to a second memory and generating writes to the second memory), duplicating memory writes of the source processor and duplicating writes by input/output adapters to create a stream of duplicate memory writes, and applying the duplicated memory writes to the first memory.

Method and system of copying memory from a source processor to a target processor by duplicating memory writes

A method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed. At least some of the exemplary embodiments may be a method comprising operating duplicate copies of a user program in a first and second processor, allowing at least one of the user programs to execute until retired instruction counter values in each processor are substantially the same, and then executing a number of instructions of each user program. Of the instructions executed, at least some of the instructions are decoded and the inputs of each decoded instruction determined (the decoding substantially simultaneously with executing in each processor). The method further comprises exchanging among the processors addresses of decoded instructions and values indicative of inputs of the decoded instructions, determining that an execution point of the user program in the first processor lags with respect to an execution point of the user program in the second processor using at least the addresses of the decoded instructions, and advancing the first processor until the execution point within each user program is substantially aligned.

Method and system of determining whether a user program has made a system level call and thus whether the user program is uncooperative with fault tolerant operation. Some exemplary embodiments may be a processor-based method comprising providing information from a first processor to a second processor (the information indicating that a user program executed on the first processor has not made a system level call in a predetermined amount of time), and determining by the first processor, using information from the second processor, whether a duplicate copy of the user program substantially simultaneously executed in the second processor has made a system level call in the predetermined amount of time.

Method and system of determining whether a user program has made a system level call

A method and system of loosely lock-stepped non-deterministic processors. Some exemplary embodiments may be a processor-based method comprising executing fault tolerant copies of a user program, one copy of the user program executed in a first processor performing non-deterministic execution, and a duplicate copy of the user program executing in a second processor performing non-deterministic execution, with the executing in the first processor and second processor not in cycle-by-cycle lock-stepped.

Method and system executing user programs on non-deterministic processors

A system and method for controlling network traffic flow in a multi-processor network is disclosed. The method employs a two-part algorithm to determine when it is appropriate for a client node to transmit data over a network to one or more server nodes. The first part of the algorithm calls for the client node to transmit data over the network after receiving an acknowledgement from one or more of the server nodes to which data transfer is outstanding. The second part of the algorithm provides for the client node transmitting data over the network after a predetermined time interval has elapsed since a data transmission. The time interval is based, in part, on the length of outstanding data packets and a statistical analysis of the number of nodes transmitting or receiving data packets. The transmission of data over the network is accomplished by a hybrid scheme, comprising a combination of PUSH and PULL transmission protocols.

System and method for controlling network traffic flow in a multi-processor network

A method and system of aligning execution point of duplicate copies of a user program by copying memory stores. Some of the exemplary embodiments may be a method comprising aligning the execution point of duplicate copies of a user program executed in a first and second processor by copying only data of memory stores performed by the user program in the first processor from a memory of the first processor to a memory of the second processor, and copying the register state of the user program from the first processor for use by the second processor.

Method and system of aligning execution point of duplicate copies of a user program by copying memory stores

In an implementation of latent error detection, memory regions that each correspond to a different processor element of a redundant processor system are scanned for latent processing errors maintained as erroneous data. The data maintained in the memory regions is compared to detect a latent processing error in a first memory region. The latent processing error is resolved by copying data from a second memory region into the first memory region where the data maintained in the second memory region is determined to be identical to data maintained in at least a third memory region.

Growing community of inventors

Cupertino, CA, United States of America

Robert L Jardine