Franklin Electronic Publishers, Incorporated

Intel Corporation

Xircom, Inc.

Robert L Grieb

Mark M Todorovich

Paul K Kavanaugh

David M McWherter, Jr

A wallet for a personal information device in the form of a PCMCIA card such as an PCMCIA-card electronic organizer. The wallet includes an input device separate from the input device of the personal information device and two halves that may be folded together in a wallet-like fashion. One of the halves generally includes a touch panel input to allow a user to enter information, commands, instructions, etc., thereto. A personal information device is mounted to the second half of the wallet. When mounted, the wallet supplies via an electrical connection or induction communication the user-supplied information entered into the touch panel input to the personal information device. The wallet display may be powered by the personal information device via the electrical connection or self-powered. Upon coupling the personal information device to the wallet, the personal information device may supply a wake signal to wake up or automatically turn on the input device of the wallet. The wallet may further include an input/output connector for coupling via a cable the wallet to an external device such as another wallet, a personal computer, etc.

Wallet detachable retaining a personal information device and receiving a wake signal and a stay awake signal from the personal information device

Wallet for personal information device

The number of opcode functions exceeds the number of opcodes available by virtue of a technique employing dual function opcodes wherein the second function is executed when a particular resolving flag is put into a set state and otherwise the first function is executed. Furthermore, a generic push opcode and a generic pop opcode are employed without any register pointer designations so that a series of push operations can be performed using a single opcode and a series of pop operations can be performed using a single opcode. The utility of the processor is further enhanced by incorporating a series of handler opcodes that permits simulating on the instruction set of the processor a program designed for a different instruction set. A special simulator opcode called a jump vector opcode is employed to control the operation of reading in the target opcode, applying an algorithm that provides the host processor address for corresponding handler opcodes and jumping to those addresses.

Processor with enhanced instruction set

A hand held electronic data processing device has an input keyboard and a display screen. A sixteen bit central processing unit (CPU) address bus addresses read only memory (ROM) and random access memory (RAM). However, a twenty bit register provides a twenty line address bus that is employed for addressing sequential data in ROM. A direct memory access (DMA) unit provides direct transfer of data from RAM to a forty bit register which controls the state of the pixels in a 240 character liquid crystal display (LCD). The keyboard is connected in an electronic matrix with rows driven by signals applied by system address bus lines. These various functions require exclusive use of the system address bus. Accordingly an address selector is employed to determine which of the functions is to capture the system address bus; the functions being (a) CPU address of ROM and RAM, (b) Register sequential address of ROM, (c) DMA address of RAM for delivery to LCD display, and (d) the driving of the rows of the keyboard matrix.

Growing community of inventors

Medford, NJ, United States of America

Robert L Grieb