Intel Corporation

Tahoe Research, Ltd.

Robert L Bristol

James M Blackwell

Kevin Lai Lin

Marie Krysak

Florian Gstrein

Richard E Schenker

Rami Hourani

Manish Chandhok

Eungnak Han

Paul Anton Nyhus

Alan M Myers

Charles Henry Wallace

Kanwal Jit Singh

Bryan J Rice

Swaminathan Sivakumar

Jasmeet S Chawla

Elliot Tan

Curtis W Ward

Ian A Young

Mauro J Kobrinsky

Jeanette M Roberts

Grant M Kloster

Arun Ramamoorthy

Melissa K Shell

Lauren Doyle

Sasikanth Manipatruni

Ravi Pillarisetty

Mark L Doczy

Dmitri E Nikonov

James S Clarke

Nicole K Thomas

Hubert C George

Chia-Ching Lin

Kramadhati V Ravi

Michael Scott Goldstein

Scott Bruce Clendenning

Patricio E Romero

Gurpreet Singh

Michael J Leeson

Tayseer Mahdi

Eric M Panning

Todd R Younkin

Michael C Mayberry

Michael Y Chan

Bruce H Billett

Shane M Harlson

Kevin Y Lin

David Ruzic

Kent N Frasure

Kevin O'Brien

Hui Jae Yoo

Robert P Meagley

Harsono S Simka

Tristan A Tronic

Vijayakumar S Ramachandrarao

John P Barnak

Paul A Zimmerman

Raseong Kim

Chytra Pawashe

Guojing Zhang

Sarah Atanasov

Heidi B Cao

Sang Hun Lee

Ming Fang

John Magana

Chang Ju Choi

Brandon Jay Holybee

Xuanxuan Chen

Emily Walker

Arvind Sundaramurthy

Swaninathan Sivakumar

Embodiments of the invention include methods of forming a textile patterned hardmask. In an embodiment, a first hardmask and a second hardmask are formed over a top surface of an interconnect layer in an alternating pattern. A sacrificial cross-grating may then be formed over the first and second hardmasks. In an embodiment, portions of the first hardmask that are not covered by the sacrificial cross-grating are removed to form first openings and a third hardmask is disposed into the first openings. Embodiments may then include etching through portions of the second hardmask that are not covered by the sacrificial cross-grating to form second openings. The second openings may be filled with a fourth hardmask. According to an embodiment, the first, second, third, and fourth hardmasks are etch selective to each other. In an embodiment the sacrificial cross-grating may then be removed.

Textile patterning for subtractively-patterned self-aligned interconnects, plugs, and vias

Advanced lithography techniques including sub-10 nm pitch patterning and structures resulting therefrom are described. Self-assembled devices and their methods of fabrication are described.

Advanced lithography and self-assembled devices

Integrated circuitry comprising an opaque material layer, such an interconnect metallization layer is first patterned with a maskless lithography to reveal an alignment feature, and is then patterned with masked lithography that aligns to the alignment feature. In some examples, the maskless lithography employs an I-line digital light processing (DLP) lithography system. In some examples the I-line DLP lithography system performs an alignment with IR illumination through a backside of a wafer. The maskless pattern may include dimensionally large windows within a frame around circuitry regions. A first etch of the opaque material layer may expose the alignment feature within the window, and a second etch of the opaque material may form IC features, such as interconnect metallization features.

Frame reveals with maskless lithography in the manufacture of integrated circuits

Embodiments include a substrate and a method of forming the substrate. A substrate includes an interlayer dielectric and conductive traces in the interlayer dielectric (ILD). The conductive traces may include a first conductive trace surrounded by a second and third conductive traces. The substrate also includes a photoresist block in a region of the ILD. The region may be directly surrounded by the ILD and first conductive trace, and the photoresist block may be between the first conductive trace. The photoresist block may have a top surface that is substantially coplanar to top surfaces of the ILD and conductive traces. The photoresist block may have a width substantially equal to a width of the conductive traces. The photoresist block may be in the first conductive trace and between the second and third conductive traces. The photoresist block may include a metal oxide core embedded with organic ligands.

Metal oxycarbide resists as leave behind plugs

A chemical composition includes a polymer chain having a surface anchoring group at a terminus of the polymer chain. The surface anchoring group is metal or dielectric selective and the polymer chain further includes at least one of a photo-acid generator, quencher, or a catalyst. In some embodiments, the surface anchoring group is metal selective or dielectric selective. In some embodiments, the polymer chain includes side polymer chains where the side polymer chains include polymers of photo-acid generators, quencher, or catalyst.

Chemical compositions and methods of patterning microelectronic device structures

Disclosed herein are structures and techniques utilizing directed self-assembly for microelectronic device fabrication. For example, a microelectronic structure may include a patterned region including a first conductive line and a second conductive line, wherein the second conductive line is adjacent to the first conductive line; and an unordered region having an unordered lamellar pattern, wherein the unordered region is coplanar with the patterned region.

Directed self-assembly structures and techniques

Approaches based on differential hardmasks for modulation of electrobucket sensitivity for semiconductor structure fabrication, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for an integrated circuit includes forming a hardmask layer above an inter-layer dielectric (ILD) layer formed above a substrate. A plurality of dielectric spacers is formed on the hardmask layer. The hardmask layer is patterned to form a plurality of first hardmask portions. A plurality of second hardmask portions is formed alternating with the first hardmask portions. A plurality of electrobuckets is formed on the alternating first and second hardmask portions and in openings between the plurality of dielectric spacers. Select ones of the plurality of electrobuckets are exposed to a lithographic exposure and removed to define a set of via locations.

Differential hardmasks for modulation of electrobucket sensitivity

Lined photoresist structures to facilitate fabricating back end of line (BEOL) interconnects are described. In an embodiment, a hard mask has recesses formed therein, wherein liner structures are variously disposed each on a sidewall of a respective recess. Photobuckets comprising photoresist material are also variously disposed in the recesses. The liner structures variously serve as marginal buffers to mitigate possible effects of misalignment in the exposure of photoresist material to photons or an electron beam. In another embodiment, a recess has disposed therein a liner structure and a photobucket that are both formed by self-assembly of a photoresist-based block-copolymer.

Lined photobucket structure for back end of line (BEOL) interconnect formation

Two-stage bake photoresists with releasable quenchers for fabricating back end of line (BEOL) interconnects are described. In an example, a photolyzable composition includes an acid-deprotectable photoresist material having substantial transparency at a wavelength, a photo-acid-generating (PAG) component having substantial transparency at the wavelength, and a base-generating component having substantial absorptivity at the wavelength.

Two-stage bake photoresist with releasable quencher

A photosensitive composition including metal nanoparticles capped with an organic ligand, wherein the metal particles includes a metal that absorbs light in the extreme ultraviolet spectrum. A method including synthesizing metal particles including a diameter of 5 nanometers or less, wherein the metal particles includes a metal that absorbs light in the extreme ultraviolet spectrum; and capping the metal particles with an organic ligand. A method including depositing a photosensitive composition on a semiconductor substrate, wherein the photosensitive composition includes metal nanoparticles capped with an organic ligand and the nanoparticles include a metal that absorbs light in the extreme ultraviolet spectrum; exposing the photosensitive composition to light in an ultraviolet spectrum through a mask including a pattern; and transferring the mask pattern to the photosensitive composition.

Ligand-capped main group nanoparticles as high absorption extreme ultraviolet lithography resists

Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnects is described. In an example, a back end of line (BEOL) metallization layer for a semiconductor structure includes an inter-layer dielectric (ILD) layer disposed above a substrate. A plurality of conductive lines is disposed in the ILD layer along a first direction. A conductive tab is disposed in the ILD layer, the conductive tab coupling two of the plurality of conductive lines along a second direction orthogonal to the first direction. A conductive via is coupled to one of the plurality of conductive lines, the conductive via having a via hardmask thereon. An uppermost surface of each of the ILD layer, the plurality of conductive lines, the conductive tab, and the via hardmask is planar with one another.

Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnects

A photoresist is disclosed. The photoresist includes a polymer with one repeating unit and an absorbing unit.

Chain scission photoresists and methods for forming chain scission photoresists

Disclosed herein are quantum dot devices, as well as related computing devices and methods. For example, in some embodiments, a quantum dot device may include: a quantum well stack including a quantum well layer; a plurality of gates disposed above the quantum well stack, wherein at least two of the gates are spaced apart in a first dimension above the quantum well stack, at least two of the gates are spaced apart in a second dimension above the quantum well stack, and the first and second dimensions are perpendicular; and an insulating material disposed above the quantum well stack, wherein the insulating material extends between at least two of the gates spaced apart in the first dimension, and the insulating material extends between at least two of the gates spaced apart in the second dimension.

Quantum dot array devices

Growing community of inventors

Portland, OR, United States of America

Robert L Bristol