Harris Corporation

Intersil Corporation

Intersil Americas Inc.

Robert K Lowry

James F Buller

Jack H Linn

George V Rouse

William H Speece

Robert T Fuller

David A Decrosta

Michael J Morrison

Howard L Evans

Edward U Adams

Geroge V Rouse

Larry A Miller

A decapsulation apparatushas a laserthat removes plastic encapsulant from a deviceChamberis sealed. Exhaust portremoves debris and fumes. The deviceis positioned and scanned using an X, Y tableA hinged endrotates the device to an acute angle of incidence with respect to a laserEndpoint detectorsenses the exposed integrated circuit and moves or shuts down the laser

Laser decapsulation method

A decapsulation apparatushas a laserthat removes plastic encapsulant from a device. Chamberis sealed. Exhaust portremoves debris and fumes. The deviceis positioned and scanned using an X, Y table. A hinged endrotates the device to an acute angle of incidence with respect to a laserEndpoint detectorsenses the exposed integrated circuit and moves or shuts down the laser

A decapsulation apparatushas a laserthat removes plastic encapsulant from a deviceChamberis sealed. Exhaust portremoves debris and fumes. The deviceis positioned and scanned using an X,Y table 2. A hinged endrotates the device to an acute angle of incidence with respect to a laser. Endpoint detectorsenses the exposed integrated circuit and moves or shuts down the laser

Laser decapsulation apparatus and method

A silicon-on-insulator integrated circuit comprises a handle die, a substantially continuous and unbroken silicide layer over the handle die, and a substantially continuous and unbroken first dielectric layer overlying one side of the silicide layer. A device silicon layer having an upper surface overlies the first dielectric layer, and a second dielectric layer on the handle die underlies the opposite side of the silicide layer. Interconnected transistors are disposed in and at the upper surface of the device silicon layer. A silicon-on insulator integrated circuit includes a handle die and a first dielectric layer formed on the handle die. A substantially continuous and unbroken silicide layer is formed on the first dielectric layer; the silicide layer has a controlled resistance and provides a diffusion barrier to impurities. A substantially continuous and unbroken second dielectric layer is disposed between the silicide layer and a device silicon layer, and trenches extend through the device silicon layer and silicide layer and separate the device silicon layer into islands, each having an underlying continuous silicide area. Interconnected transistors are disposed in and at an upper surface of the device silicon layer. A bonded wafer integrated circuit comprised a handle die and a homogeneous silicide layer bonded to the handle die. A device layer is bonded to the silicide layer, and interconnected transistors are disposed in and at a surface of device layer.

Bonded wafer with metal silicidation

The decapsulating method is for an integrated circuit package and includes the steps of subjecting the encapsulant to electromagnetic radiation, and, more preferably microwave radiation, to break the polymer bonds of the polymer resin and convert the encapsulant to loosened particles. The loosened particles can then be removed to thereby decapsulate the integrated circuit package. The method may further include the step of maintaining the integrated circuit package below a predetermined temperature during the subjecting step. The step of maintaining the temperature below the predetermined temperature may be performed by controlling a power of the electromagnetic radiation, such as based upon sensing a temperature of the integrated circuit package. The method may further comprise the step of varying a frequency of the microwave radiation during the subjecting step.

Decapsulating method and apparatus for integrated circuit packages

A decapsulation apparatus has a laser that removes plastic encapsulant from a device Chamber is sealed. Exhaust port removes debris and fumes. The device is positioned and scanned using an X,Y table A hinged end rotates the device to an acute angle of incidence with respect to a laser Endpoint detector senses the exposed integrated circuit and moves or shuts down the laser

A EEPROM 140 has a storage transistor 160 with a gate insulating layer 104 of BPSG and a polysilicon gate 112.2 of the same layer as the polysilicon gate 112.1 of the FET transistor 150. The BPSG layer 104 has POHC traps that capture holes injected into N well 103.2. A positive voltage applied to N well 103.2 programs the storage transistor 160 off. Applying a positive voltage to the gate 112.2 neutralizes the holes stored in layer 104 and erases the memory of transistor 160.

Radiation hardened dielectric for EEPROM

Low temperature wafer bonding using a chemically reacting material between wafers to form a bonded zone to bond two wafers together. Examples include silicon wafers with a silicon-oxidizing bonding liquid which also permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Silicon wafers also may use solid reactants which include deposited layers of metal and polysilicon to form silicide bonded zones. Oxidizers such as nitric acid may be used in the bonding liquid, and a bonding liquid may be used in conjunction with a solid bonding reactant. Dielectric layers on silicon wafers may be used when additional silicon is provided for the bonding reactions. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening and buried resistors.

Bonded wafer processing with oxidative bonding

Low temperature wafer bonding using a silicon-oxidizing bonding liquid permits introduction of radiation hardening dopants and electrically active dopants as constituents of the bonding liquid. Oxidizers such as nitric acid may be used in the bonding liquid. Dielectric layers on the device wafer and the handle wafer may be used when additional silicon is provided for the oxidative bonding. Integrated circuits fabricated from such bonded wafers may have buried layers and radiation hardening with device silicon too thick for implantation.

Bonded wafer processing

Low temperature silicon-on-insulator wafer bonding using a silicide bond formation reaction. Dielectric isolation with silicon dioxide, diamond, silicon-nitride, and so forth yields buried resistors under trench isolated silicon islands. Buried dielectrics can be thermally susceptible films like diamond due to the low temperature of the bonding silicidation reaction. Bonding silicides also provide thermal dissipating layer between a buried diamond layer and a handle wafer for good overall thermal conductivity. Bonding silicides also act as diffusion barriers.

Bonded wafer processing with metal silicidation

Low temperature silicon-on-insulator wafer bonding using a silicide bond formation reaction. Dielectric isolation with silicon dioxide, diamond, silicon nitride, and so forth yields buried resistors under trench isolated silicon islands. Buried dielectrics can be thermally susceptible films like diamond due to the low temperature of the bonding silicidation reaction. Bonding silicides also provide thermal dissipating layer between a buried diamond layer and a handle wafer for good overall thermal conductivity. Bonding silicides also act as diffusion barriers. The silicide bonding takes place in the presense of a liquid oxidizer such as aqueous solution of HNO.sub.3 and H.sub.2 O.sub.2.

Growing community of inventors

Melbourne Beach, FL, United States of America

Robert K Lowry