Taiwan Semiconductor Manufacturing Comp. Ltd.

Koninklijke Philips Corporation N.V.

Nxp B.v.

Interuniversitair Microelektronica Centrum (imec)

Robert James Lander

Jacob Christopher Hooker

Gerben Doornbos

Marcus Johannes Henricus Van Dal

Robertus Adrianus Maria Wolters

Thomas Merelle

Robertus Wolters

A device and method of fabricating the same are disclosed. In an example, a device includes a first fin Field Effect Transistors (finFET) formed on a substrate. The first finFET including a fin formed on the substrate. The device further includes a second finFET formed on the substrate. The first finFET and the second finFET share the fin and wherein the first finFET is without any low density doped (LDD) extension region in the substrate and wherein the second FinFET is associated with a first LDD extension region formed in the substrate such that a drive strength of the second finFET is greater relative to a drive strength of the first finFET.

FinFET drive strength modification

A Fin FET whose fin () has an upper portion () doped with a first conductivity type and a lower portion () doped with a second conductivity type, wherein the junction () between the upper portion () and the lower portion () acts as a diode; and the FinFET further comprises: at least one layer () of high-k dielectric material (for example SiN) adjacent at least one side of the fin () for redistributing a potential drop more evenly over the diode, compared to if the at least one layer of high-k dielectric material were not present, when the upper portion () is connected to a first potential and the lower portion () is connected to a second potential thereby providing the potential drop across the junction (). Examples of the k value for the high-k dielectric material are k&#x2267;5, k&#x2267;7.5, and k&#x2267;20.

Fin field effect transistor (finFET)

The invention relates to a CMOS device () with an NMOST I and PMOSThaving gate regions (D,D) comprising a compound containing both a metal and a further element. According to the invention the first and second conducting material both comprise a compound containing as the metal a metal selected from the group comprising molybdenum and tungsten and both comprise as the further element an element selected from the group comprising carbon, oxygen and the chalcogenides. Preferably both the first and second conducting material comprise a compound of molybdenum and carbon or oxygen. The invention also provides an attractive method of manufacturing such a device.

Semiconductor device and method of manufacturing such a semiconductor device

Consistent with an example embodiment, a method of manufacturing a semiconductor device comprises MOS transistors having gate electrodes formed in a number of metal layers deposited upon one another. Active silicon regions having a layer of a gate dielectric and field-isolation regions insulating these regions from each other are formed in a silicon body. Then, a layer of a first metal is deposited in which locally, in a part of the active regions, nitrogen is introduced. On the layer of the first metal, a layer of a second metal is then deposited, after which the gate electrodes are etched in the metal layers. Before nitrogen is introduced into the first metal layer, an auxiliary layer of a third metal permeable to nitrogen is deposited an the first metal layer. Thus, the first metal layer can be nitrided locally without the risk of damaging the underlying gate dielectric.

Method of manufacturing MOS transistors with gate electrodes formed in a packet of metal layers deposited upon one another

A semiconductor device, fabricated by a method, having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate is disclosed. In one embodiment, the method includes i) forming, at least at the silicon region, a metal cluster layer from a first metal, such that, in the metal cluster layer, metal clusters alternate with sites where there are no metal clusters, the first metal being a non-siliciding metal at predetermined conditions, ii) depositing a metal layer of a second metal on top of the metal cluster layer, the second metal being a siliciding metal and iii) carrying out at least one heat treatment at the predetermined conditions on the second metal layer so as to form metal silicide through reaction of the second metal with the silicon region, wherein atoms of the first metal are displaced in a direction substantially perpendicular to the surface of the substrate.

Semiconductor device fabricated by a method of reducing the contact resistance of the connection regions

One embodiment of the invention relates to a method for fabricating a semiconductor device having a semiconductor structure with a silicon region which forms at least one connection region in and/or on a surface of a substrate. The method comprises forming a metal cluster layer from a first, non-siliciding metal, followed by the deposition of a metal layer consisting of a second, siliciding metal. A subsequent heat treatment is responsible for forming a metal silicide from the second metal, the atoms of the first metal being displaced in a direction substantially perpendicular to the surface of the substrate. According to one embodiment of the invention, the atoms of the first metal are displaced by the Kirkendall effect to beneath the metal silicide. If an MOST, for example, is being fabricated, this has advantages both at the location of the source and drain region and at the location of the gate electrode.

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Leuven, Belgium

Robert James Lander