International Business Machines Corporation

Robert James Incerto

Joseph Anthony Petrosky, Jr

Leo Boyes Freeman

Leo B Freeman, Jr

Disclosed is a self-isolating cross-coupled sense amplifier latch circuit having five enhancement mode field effect transistor devices and two depletion mode field effect transistor devices. The first and second field effect transistors form a cross-coupled pair with true and complement outputs being available at the cross-coupled nodes. A third field effect transistor is connected to a common connection between the source electrodes of the cross-coupled pair and is used to establish a race condition after a small difference in potential has been applied to the aforementioned output nodes. A pair of depletion mode devices are connected as diodes between a positive potential (VH) and each of the output nodes, respectively. Each of the output nodes is connected to a respective bit line of a column of memory cells through enhancement mode field effect transistors connected as third and fourth unidirectionally conducting devices.

Self-isolating cross-coupled sense amplifier latch circuit

A circuit comprising the parallel connection of an enhancement-and a depletion-type FET which exhibits reduced power and improved performance for both logic as well as memory circuits.

Enhancement-and depletion-type field effect transistors connected in

A dual channel high gain differential amplifier utilizing enhancement depletion MOS field effect transistors which exhibits high common mode rejection and fast switching characteristics.

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Poughkeepsie, NY, United States of America

Robert James Incerto