International Business Machines Corporation

Globalfoundries Inc.

Robert J Polastre

John Ulrich Knickerbocker

Paul Stephen Andry

Minhua Lu

Bing Dang

Bucknell Chapman Webb

Jae-Woong Nah

Qianwen Chen

Leslie C Jenkins

Michael S Gordon

Paul Alfred Lauro

Russell Alan Budd

Frank Robert Libsch

Adinath S Narasgond

Michael Patrick Mastro

Robert Wayne Nywening

Michael A Gaynes

Robert L Wisnieff

Raymond R Horton

Eric Peter Lewandowski

Shinichi Kimura

Ronald R Troutman

Yoshikazu Ichioka

A method for forming a battery structure includes texturing an anode packaging material to form a first textured surface, depositing one or more metal layers including an anode metal on the first textured surface and forming a separator on the anode metal. It also includes texturing a cathode packaging material to form a second textured surface, depositing a cathode metal on the second textured surface, and forming an electrolyte binder paste on the cathode metal, which contacts the separator with any gap being filled with electrolyte.

Low-profile battery construct with engineered interfaces

An electro-optical module assembly is provided that includes a flexible substrate having a first surface and a second surface opposite the first surface, wherein the flexible substrate contains an opening located therein that extends from the first surface to the second surface. An optical component is located on the second surface of the flexible substrate and is positioned to have a surface exposed by the opening. At least one electronic component is located on a first portion of the first surface of the flexible substrate, and at least one micro-energy source is located on a second portion of the first surface of the flexible substrate.

Method of forming a plurality of electro-optical module assemblies

Integrated electro-optical module assembly

A battery structure includes an anode packaging material having a first textured surface and an anode metal formed on the first textured surface. A separator is formed on the anode metal. A cathode packaging material includes a second textured surface. A cathode metal is formed on the second textured surface. An active cathode paste is formed on the cathode metal and brought into contact with the separator such that any gap is filled with electrolyte.

A method for aligning a scan laser beam on a wafer include scanning a scan laser beam across a laser beam sensor along a scan line, picking up a scan laser beam, at a first position, using a first optical slit of the laser beam sensor to generate a first electrical pulse, picking up the scan laser beam, at a second position, using a second optical slit of the laser beam sensor to generate a second electrical pulse, picking up the scan laser beam, at a third position, using a third optical slit of the laser beam sensor to generate a third electrical pulse, and determining a spot size and a position of the laser beam based on the first to third electrical pulses.

In-situ laser beam position and spot size sensor and high speed scanner calibration, wafer debonding method

A method and system for aligning a scan laser beam on a wafer include scanning a scan laser beam across a laser beam sensor along a scan line, picking up a scan laser beam, at a first position, using a first optical slit of the laser beam sensor to generate a first electrical pulse, picking up the scan laser beam, at a second position, using a second optical slit of the laser beam sensor to generate a second electrical pulse, picking up the scan laser beam, at a third position, using a third optical slit of the laser beam sensor to generate a third electrical pulse, and determining a spot size and a position of the laser beam based on the first to third electrical pulses.

A lens structure includes a transparent cell containing a liquid crystal material. The cell is thicker in a center region thereof than at peripheral regions. The structure further includes transparent electrically conductive electrodes coupled with opposing top and bottom surfaces of the cell and configured to establish an electric field through the cell that is strongest at the peripheral regions where the cell is thinner relative to the center region so that a value of the index of refraction of the liquid crystal material changes across the cell from the center region towards the peripheral regions to change an effective focal length of the lens structure. In some embodiments the top surface of the cell has a first curvature Cand the bottom surface of the cell has a second curvature Cthat differs from the first curvature.

Liquid crystal lens with variable focal length

A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant.

Low cost hermetic micro-electronics

A method for providing a matrix material between a bonded pair of substrates with a homogeneous distribution of anisotropic filler particles is provided. Functionalized anisotropic filler particles are mixed uniformly with a matrix material to form a homogenous mixture. A bonded assembly of a first substrate and a second substrate with an array of electrical interconnect structures is placed within a vacuum environment. The homogenous mixture of the matrix material and the anisotropic filler particles is dispensed around the array of electrical interconnect structures. A gas is abruptly introduced into the vacuum environment to induce an implosion of the homogenous mixture. The implosion causes the homogenous mixture to fill the cavity between the first and second substrates without causing agglomeration of the anisotropic filler particles. The mixture filling the space between the first and second substrates has a homogenous distribution of the anisotropic filler particles.

Injection of a filler material with homogeneous distribution of anisotropic filler particles through implosion

A transfer process for bonding a solderable device to a solderable firsl substrate having a first oxidized surface comprises placing the solderable device proximate to the first substrate in a reducing chamber, where the first surface cannot be visually observed. We place a second substrate having a second oxidized surface in the chamber in a way to visually observe the second surface. Selecting the first substrate and the second substrate so that the reduction of the second surface correlates with the reduction of the first surface provides an indication of the degree of reduction of the first surface. Introducing a reducing agent into the chamber under reducing conditions reduces the surfaces which we track by irradiating and observing the second surface; evaluate any change in the second surface during irradiation and correlate the change with first surface reduction. When sufficiently reduced, we solder the first substrate to the device.

Process for mapping formic acid distribution

A device for use in a display system including an array of pixel cells formed on a substrate. Each pixel cell being coupled to at least one gate line of a plurality of gate lines formed on the substrate and at least one data line of a plurality of data lines being formed on the substrate. The device includes first and second transistors formed on the substrate. Each transistor has a gate electrode and first and second electrodes defining a serpentine channel region there between voltage applied to the gate electrode controls conductivity of the channel region. Preferably, a common electrode includes one of the first and second electrodes of the first transistor and one of the first and second electrodes of the second transistor. The first and second transistors are preferably coupled between a gate line (or data line) and respective probe pads formed on the substrate and selectively couple the respective probe pad to the gate line (or data line) during a test routine whereby charge is written to, stored, and read from the array of pixel cells.

Growing community of inventors

Cold Spring, NY, United States of America

Robert J Polastre