Micron Technology Incorporated

Robert J Pintar

Reshmi Basu

Richard Donald Maes, Ii

Katie Blomster Park

Gary A Johnson

A method is described that includes receiving a write request with user data and a logical address and select a next address queue from a plurality of next address queues based on a reciprocal relationship between short-term usage information associated with the logical address and a set of characteristics of the selected next address queue. Each next address queue in the plurality of next address queues stores physical addresses that are designated to be used for fulfilling write requests. Further, a next physical address is removed from the selected next address queue and the user data of the write request is written to the next physical address in a memory device.

Profile and queue-based wear leveling of memory devices

A method for wear leveling memory elements in a memory component of a memory subsystem is described. The method includes a memory subsystem receiving a write request that includes user data and a logical address, removing a next physical address from a next address queue, which stores physical addresses that are designated to be used for fulfilling write requests, and writing the user data to the next physical address in the memory component. Further, the memory subsystem locates, in a logical-to-physical table, an entry associated with the logical address of the write request and includes an old physical address that is mapped to the logical address of the write request. The memory subsystem adds the old physical address to a disposal address queue, wherein the disposal address queue stores physical addresses that are not designated to be used for fulfilling write requests.

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Spokane, WA, United States of America

Robert J Pintar