Micron Technology Incorporated

Round Rock Research, LLC

Robert J Hanson

Janos Fucsko

Won-Joo Kim

Alex J Schrinsky

Terry McDaniel

Sanh D Tang

Mark Fischer

Kevin J Torek

Brian Dolan

Chan Lim

Mike E Pugh

Yongjun Jeff Hu

Donald L Yates

David A Kewley

Gundu M Sabde

Prashant Raghu

Hongqi Li

Niraj B Rana

Daniel Billingsley

Jim J Browning

Suresh Ramarajan

Jin Lu

Xiaosong Zhang

Gowrisankar Damarla

Shyam Ramalingam

Patrick M Flynn

Sandra Tagg

Keen Wah Chow

Biow Hiem Ong

Seungwoo Lee

Michael J Irwin

Gary A Evans

David H Chun

Kyle Grant

Md Zahid Hossain

Richard H Lane

Allen McTeer

Fred D Fishburn

Kevin R Shea

Hongmei Wang

Shu Qin

T Earl Allen

Siddartha Kondoju

An apparatus comprises a structure including an upper insulating material overlying a lower insulating material, a conductive element underlying the lower insulating material, and a conductive material comprising a metal line and a contact. The conductive material extends from an upper surface of the upper insulating material to an upper surface of the conductive element. The structure also comprises a liner material adjacent the metal line. A width of an uppermost surface of the conductive material of the metal line external to the contact is relatively less than a width of an uppermost surface of the conductive material of the contact. Related methods, memory devices, and electronic systems are disclosed.

Apparatus and memory device including conductive lines and contacts, and methods of forming an apparatus including conductive lines and contacts

Apparatus comprising structures including contact vias and conductive lines, related methods, and memory devices

Methods of removing metal from a portion of a substrate include exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent, determining whether metal remaining on the portion of the substrate is less than or equal to a particular level, and exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent if the metal remaining on the portion of the substrate is deemed to be greater than the particular level.

Removal of metal

Some embodiments include semiconductor constructions having first and second electrically conductive lines that intersect with one another at an intersection. The first line has primarily a first width, and has narrowed regions directly against the second line and on opposing sides of the second line from one another. Electrically conductive contacts are along the first line and directly electrically coupled to the first line, and one of the electrically conductive contacts is directly against the intersection. Some embodiments include methods of forming intersecting lines of material. First and second trenches are formed, and intersect with one another at an intersection. The first trench has primarily a first width, and has narrowed regions directly against the second trench and on opposing sides of the second trench from one another. Material is deposited within the first and second trenches to substantially entirely fill the first and second trenches.

Semiconductor constructions and methods of forming intersecting lines of material

Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, determining whether metal remaining on the portion of the substrate is less than or equal to a particular level, and if the metal remaining on the portion of the substrate is deemed to be greater than the particular level, exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.

Semiconductor constructions

Methods of removing metal from a portion of a substrate are useful in integrated circuit fabrication. Methods include exposing the substrate to an oxidizing environment comprising at least one oxidizing agent and at least one reducing agent, and exposing the substrate to a reducing environment comprising at least one reducing agent and at least one oxidizing agent.

Novel etch techniques are provided for shaping silicon features below the photolithographic resolution limits. FinFET devices are defined by recessing oxide and exposing a silicon protrusion to an isotropic etch, at least in the channel region. In one implementation, the protrusion is contoured by a dry isotropic etch having excellent selectivity, using a downstream microwave plasma etch.

Subresolution silicon features and methods for forming the same

Some embodiments include methods of treating semiconductor substrates. The substrates may be exposed to one or more conditions that vary continuously. The conditions may include temperature gradients, concentration gradients of one or more compositions that quench etchant, pH gradients to assist in removing particles, and/or concentration gradients of one or more compositions that assist in removing particles. The continuously varying conditions may be imparted by placing the semiconductor substrates in a bath of flowing rinsing solution, with the bath having at least two feed lines that provide the rinsing solution therein. One of the feed lines may be at a first condition, and the other may be at a second condition that is different from the first condition. The relative amount of rinsing solution provided to the bath by each feed line may be varied to continuously vary the condition within the bath.

Methods of treating semiconductor substrates, methods of forming openings during semiconductor fabrication, and methods of removing particles from over semiconductor substrates

Some embodiments include methods of forming isolation regions in which spin-on material (for example, polysilazane) is converted to a silicon dioxide-containing composition. The conversion may utilize one or more oxygen-containing species (such as ozone) and a temperature of less than or equal to 300&#xb0; C. In some embodiments, the spin-on material is formed within an opening in a semiconductor material to form a trenched isolation region. Other dielectric materials may be formed within the opening in addition to the silicon dioxide-containing composition formed from the spin-on material. Such other dielectric materials may include silicon dioxide formed by chemical vapor deposition and/or silicon dioxide formed by high-density plasma chemical vapor deposition.

Methods of forming oxides, methods of forming semiconductor constructions, and methods of forming isolation regions

The invention includes methods of forming field effect transistors. In one implementation, the invention encompasses a method of forming a field effect transistor on a substrate, where the field effect transistor comprises a pair of conductively doped source/drain regions, a channel region received intermediate the pair of source/drain regions, and a transistor gate received operably proximate the channel region. Such implementation includes conducting a dopant activation anneal of the pair of source/drain regions prior to depositing material from which a conductive portion of the transistor gate is made. Other aspects and implementations are contemplated.

Methods of forming field effect transistors on substrates

A method for removing at least one photoresist defect is disclosed. The photoresist defect is exposed to a plasma produced from a source gas including oxygen and a non-oxidizing gas in a plasma reactor, wherein the oxygen is present in the source gas at from 1% by volume to about 89% by volume. The non-oxidizing gas includes a mixture of hydrogen and nitrogen, ammonia or combinations thereof. A method for processing a semiconductor device structure is also disclosed, as are embodiments of the source gas.

Methods for removing photoresist defects and a method for processing a semiconductor device structure

Growing community of inventors

Boise, ID, United States of America

Robert J Hanson