Storage Technology Corporation

Robert J Hancock

William A Burns

James B Hall

An error detection and correction method for digital data storage is described which comprises horizontal and vertical generation of parity check bits. These may be used to correct errors in up to two bits per word and to indicate whether all errors in a given record have been corrected during a read operation or not. Hamming codes are used to generate check bits in a vertical direction, while cyclic redundancy codes are used in the horizontal direction. The invention is described as embodied in a solid-state memory unit utilizing charge-coupled devices for data storage.

Growing community of inventors

Boulder, CO, United States of America

Robert J Hancock