Motorola Corporation

Robert I Foster

James Douglas Dworkin

Michael J Torla

John Michael Buss

Rodney C Tesch

Sam M Daniel

Ray O Waddoups

David G Leeper

Thomas J Mihm, Jr

Ronald V Chandos

Robert F Pfeifer

Paul Robert Handly

Beth A Longbrake

Carson P Edwards

Jan Madsen

A self-organizing network and method of operation includes a plurality of kindred nodes and, in some applications, a hub node communicating data packets from source nodes to destination nodes remote from the source nodes. Each data packet includes information (e.g. priority, number of hops, etc.) and packet handling commands. A source node receives data packets with the information and packet handling commands and adjusts its operation (e.g. transmitting power, frequency, bandwidth, etc.) in a way that allows the network to be self-organizing, self-configuring, and self-healing so that data packets are retransmitted from source nodes to destination nodes with a minimum of hops and delay.

Self-organizing network with decision engine and method

A co-processor ( ) executes a mathematical algorithm that computes modular exponentiation equations for encrypting or decrypting data. A pipelined multiplier ( ) receives sixteen bit data values stored in an A/B RAM ( ) and generates a partial product. The generated partial product is summed in an adder ( ) with a previous partial product stored in a product RAM ( ). A modulo reducer ( ) causes a binary data value N to be aligned and added to the summed value when a particular data bit location of the summed value has a logic one value. An N RAM ( ) stores the data value N that is added in a modulo reducer ( ) to the summed value. The co-processor ( ) computes the Foster-Montgomery Reduction Algorithm and reduces the value of (A*B mod N) without having to first compute the value of &mgr; as is required in the Montgomery Reduction Algorithm.

Circuit and method for fast modular multiplication

A co-processor (,) executes a mathematical algorithm that computes modular exponentiation equations for encrypting or decrypting data. A pipelined multiplier (,) receives sixteen bit data values stored in an A/B RAM (,) and generates a partial product. The generated partial product is summed in a summer (,) with a previous partial product stored in a product RAM (,). A modulo reducer (,) causes a binary data value N to be aligned and added to the summed value when a particular data bit location of the summed value has a logic one value. An N RAM (,) stores the data value N that is added in a modulo reducer (,) to the summed value. The co-processor (,) computes the Foster-Montgomery Reduction Algorithm and reduces the value of (A*B mod N) without having to first compute the value of &mgr; as is required in the Montgomery Reduction Algorithm.

Circuit and method of modulo multiplication

A sequence-controlled digital circuit (21) is presented. The circuit (21) includes a divider (55) and a plurality of transparent latches (51-54) which together form a latch-based sequencer (42). Typically, a clock signal (43) is divided by the divider (55) into an inverted half-clock signal (45) and a non-inverted half-clock signal (44), each enabling alternate latches (51-54) arranged in a cascade. In the cascade, an output of each latch (51-54) drives an input of the following latch (51-54), one such being an inverting output and the rest non-inverting outputs, to form a twisted-loop counter (50). Each output of each latch (51-54) drives a clock input of a flip-flop (61-68), with a serial input signal (46) driving all data inputs, to form a temporal-to-spacial converter (40). Only the divider (55) operates at the rate of the clock signal (43).

Transparent latch-based sequencer and sequence controlling method

A computer system includes a Key Certification Agency (KCA) (12), a host computer (16), and a number of remote terminals (14). The KCA (12) uses incompatible encryption processes (96, 98) to encrypt session control data and to store the data as various messages (44, 46, 48) in a user token (26). The token (26) may be removably installed in any remote terminal (14). To set up a communication session, the token uncovers one of the messages (48) using a crypto-uncovering agent which is known to the user. This message includes a remote traffic key after deciphering, but the key is never transmitted to the host. The host (16) deciphers the other messages (44, 46) and constructs a host traffic key in response to data contained therein. No plain text is transmitted during the setup or the session.

Computer system and method for secure remote communication sessions

A hierarchical key management system includes a number of secure terminals. These terminals provide secure access to a corresponding number of users. A user inserts a security activation device or key into the secure terminal to access a secure connection through the established communication network. A group of secure wireline terminals is connected to a key certification authority. There may be several groups of key certification authorities and corresponding secure terminal users. At the highest level, a key certification center authorizes secure communications by the key certification authorities. In turn, the key certification authorities authorize secure communications between the users. As a result, if one level of key management is compromised, other levels and users are not affected.

Hierarchical key management system

A microprocessor based system which implements BCH decoder algorithms in a sufficiently efficient manner to allow real time BCH decoding of a BCH(255,131) code is disclosed. Table lookup operations utilizing successive M-bit serial portions of BCH encoded input data as table offsets permit the microprocessor to generate syndrome using M-bit parallel portions of the input data. Additional table lookup operations which utilize tables stored in ROM memory speed execution time of multiply operations and detection of roots for inverse error location polynomials.

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Mesa, AZ, United States of America

Robert I Foster