Unisys Corporation

Robert H Carlson

Carl L Ostrowski

James Rhodes

Terry Sinclair Connacher

Daniel L Baker

A signal translator circuit, for use in sending test signals to an IC-chip in a chip testing system, includes first and second resistors, and a single transistor. The transistor has a current channel which is coupled in series with the first resistor between a source voltage terminal and an output terminal. The single transistor also has a control lead, for enabling and disabling the flow of current through the current channel, which receives an input test signal at voltage levels that are to be translated. The output terminal is coupled through the second resistor to a reference voltage terminal. The output terminal is also coupled to an input terminal of a socket which is structured to hold the IC-chip.

Single-transistor two resistor circuit which translate test signals to selectable voltage levels

An electromechanical module, for holding IC-chips in a chip testing system, includes a circuit board having a plurality of sockets mounted thereon. Each socket is structured to hold one IC-chip that is to be tested, and each socket has a corresponding register on the circuit board. In addition, a bus is on the circuit board, which&#x2014;a) sends a timing pulse to a clock input on all of the registers in parallel, and b) concurrently sends a clock signal and N&#x2212;1 test signals to N data inputs on all of the registers. Further, each socket has N input terminals that are connected to N outputs on a respective set of signal translators on the circuit board, and each set of signal translators has N inputs that are connected to N data outputs on the socket's corresponding register.

Electromechanical module, for holding IC-chips in a chip testing system, that synchronizes and translates test signals to the IC-chips

Systems allowing smooth, trouble-free, 'transparent' switchover from a 'Primary clock' to a 'Secondary clock', with no loss of clock or essential pulse-width, and where the 'Secondary clock' may be completely separate from, and independent of, the 'Primary clock.'

Method for dynamically switching between a plurality of clock sources

Method for switching between a plurality of clock sources upon detection

An apparatus and method for handling the connection/disconnection transition period of a printed circuit board to an actively empowered backplane which eliminates damaging surge currents and glitches by the use of temporarily functioning field effect transistor circuits which gradiently handle the current loads during the transition period. A set of specifically sized and predetermined lengths of connecting pins on the backplane insures that a programmed sequence of power connection and/or disconnection will occur which permits a group of field effect transistors to gradiently carry the changing current loads that occur during the insertion of the printed circuit board into the backplane. Likewise, during extraction of the printed circuit board from the backplane, the group of FETs (Field Effect Transistors) will carry and buffer the changing current loads from de-stabilizing the power supply source unit.

Growing community of inventors

Laguna Niguel, CA, United States of America

Robert H Carlson