Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V.

Robert Gernhardt

Hans-Hermann Oppermann

Kai Zoschke

Tolga Tekin

Martin Wilke

Charles-Alix Manier

A method for manufacturing a semiconductor component including: providing a flat carrier with an upper side and a lower side, the carrier including a continuous opening that runs between the upper side and the lower side; providing a semiconductor arrangement that includes a semiconductor chip that includes electrically and/or optically active regions on a lower side; arranging the semiconductor arrangement in the opening such that a lower side of the semiconductor arrangement and the lower side of the carrier run in a common plane; casting the semiconductor arrangement with a potting compound, such that the semiconductor arrangement is materially connected to the carrier; and thinning out the semiconductor system by way of grinding from above, such that an upper side of the carrier and an upper side of the semiconductor arrangement run in a common plane.

Growing community of inventors

Berlin, Germany

Robert Gernhardt