Harris Corporation

Intersil Americas Inc.

Intersil Corporation

Robert G Hodgins

Thomas Andrew Jochum

Charles Edward Hawkes

Michael M Walters

Volodymyr A Muratov

A DC-to-DC converter has a pulse width modulator PWM) and a hysteretic (ripple) modulator. For low current loads, the hysteretic modulator is selected; for high current loads, the PWM is selected. A mode selection switch senses the polarity of the switched output voltage at the end of each switching cycle. If the polarity changes from one cycle to the next, the mode may be instantly changed to the other mode. Counters are used to record the polarity at the end of each cycle and switching from one mode to another can be delayed by the counters to prevent changing modes based on spurious output voltage fluctuations.

DC to DC converter method and circuitry

Dc to DC converter method and circuitry

A DC-to-DC converter includes a pulse width modulation circuit for modulating a switch to produce current pulses having at least a minimum pulse width to thereby control an output voltage to the load. The converter also includes a current limit determining circuit for determining when a desired peak current is no longer sufficient to maintain a desired output voltage thereby defining a current limit condition. In addition, the pulse width modulating circuit, when operating at the minimum pulse width, thereby defines a minimum pulse width condition. Accordingly, the converter preferably further includes an over-current determining circuit for determining an over-current condition responsive to the minimum pulse width condition being reached during a current limit condition. The converter may turn off the switch responsive to an over-current condition. A blanking signal may be used to clamp a comparator and established a minimum pulse width. Accordingly, a timer may also be used with the blanking signal to determine that the minimum pulse width condition has been reached. Method aspects of the invention are also disclosed.

DC-to-DC converter having fast over-current detection and associated

A DC-to-DC converter includes a comparator for controlling a high-side switch and has one input connected to a switch signal and another input connected to a peak current reference signal. A comparator bias boost circuit increases a bias to the comparator to provide accurate comparisons even when the switch signal and the peak current reference signal are both relatively close to a voltage of the source. The additional bias may be provided by a voltage which is typically available for a DC-to-DC converter. More particularly, the high-side switch has a terminal defining a phase node, and the additional bias voltage may be provided by a capacitor referenced to the phase node to provide the bias higher than a voltage of the source and responsive to switching at the phase node. The converter preferably further includes one or more clamps for clamping the output of the comparator during a relatively rapid change in the bias. A clock may be used for turning on the high-side switch. The comparator may include an additional input, and the clamps may further deliver a blanking signal based upon the clock to the additional input of the comparator so that at least one of the comparator output and inputs is clamped responsive to the blanking signal. Method aspects of the invention are also disclosed.

DC-to-DC converter having enhanced control features and associated

A method and circuit for modifying the clamping level (VCLAMP) of the error signal voltage (VERROR), which clamp in turn limits the peak current in the inductor of a slope-compensated, current mode DC/DC converter. VCLAMP may be modified and/or variable such that it is a function of average current in the inductor, peak current in the inductor, the converter duty cycle and/or the level of slope compensation used in the converter. The modification of VCLAMP may result in the peak current limit being independent of the converter duty cycle and/or the level of slope compensation used in the converter. Further, the modification of VCLAMP does not compromise the operational stability of the converter which is achieved by the use of a slope compensation. In addition, the clamping of the error signal before slope compensation rather than after slope compensation avoids instability at high duty cycles.

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Durham, NC, United States of America

Robert G Hodgins