Texas Instruments Corporation

Robert F Mortan

Joe D Woodall

A packaged semiconductor device includes a lead frame including plurality of lead terminals each having a plated wettable flank dimple including 2 or more different widths including narrower lead terminals and wider lead terminals. A semiconductor die is attached to the lead frame. A mold material terminates at a saw line of the packaged semiconductor device providing encapsulation except for an exposed bottom contact and an exposed sidewall contact for the plurality of lead terminals. The wider lead terminals have a necked region with a reduced width extending inward a predetermined distance from the saw line, where a terminal region inward beyond the necked region which is wider as compared to the necked region.

Packaged device having selective lead pullback for dimple depth control

A thermally enhanced BGA semiconductor devicehaving a heat sinkformed from a single piece of material with an expanded base and a pedestal in contact with a semiconductor chipThe pedestal is aligned through a window opening in a substrateand the top surface of the base is adhered to the substrate. The heat sinkwith an expanded base provides a path for rapid and efficient heat spreading and dissipation, a stand-off and an aid to improved package planarity during reflow to a PCB, and a long path for ingress of contaminants into the package. The device is amenable to high volume, low cost production.

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McKinney, TX, United States of America

Robert F Mortan