Intel Corporation

Robert E Frickey

Xin Guo

Yogesh B Wakchaure

Paul D Ruby

David J Pelster

Ye Zhang

Jonathan M Hughes

Ning Wu

Wei Fang

Joseph F Doller

Justin R Dayacap

Embodiments include apparatuses, method, and systems for organizing individual memory dice of a memory device into a plurality of virtual dice and designating one of the virtual dice of the memory device for storage of redundancy information. In one embodiment, a memory controller includes memory allocation logic to organize memory resources of individual memory dice of a memory device into a plurality of virtual dice, including a redundancy virtual die for storing redundancy information and a plurality of data virtual dice for storing data. The memory controller may further include input/output logic to write data to the data virtual dice of the non-volatile memory device, and redundancy information logic to generate redundancy information based on the data and to write the redundancy information to the redundancy virtual die of the non-volatile memory device.

Managing redundancy information in a non-volatile memory

Provided are a method, apparatus, and a system for measuring latency of a storage device. The storage device measures one or more latencies of one or more input/output (I/O) operations received from a host. The storage device transmits information on the one or more latencies to the host.

Measurement and reporting of the latency of input and output operations by a solid state drive to a host

A method and system to improve the performance of a multi-level cell (MLC) NAND flash memory. In one embodiment of the invention, the metadata associated with the data stored in a MLC NAND flash memory is stored only in one or more lower pages of the MLC NAND flash memory. The MLC NAND flash memory has lower and upper pages, where the lower pages have a faster programming time or rate than the upper pages in one embodiment of the invention. By storing the metadata only in the pages of the MLC NAND flash memory that have low latencies of programming, the quality of service (QoS) of the MLC NAND flash memory can be improved.

Method and system to improve the performance of a multi-level cell (MLC) NAND flash memory

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Sacramento, CA, United States of America

Robert E Frickey