Axcelis Technologies, Inc.

Fusion Systems Corporation

Axeclis Technologies, Inc.

Robert Douglas Mohondro

Ivan Berry

John Scott Hallock

Alan C Janos

Anthony Sinnot

Kevin Stewart

Qingyuan Han

Mahmoud Dahimene

Stuart Rounds

Terrence Alair McDevitt

Jeffrey Allan Eisele

A process for optically reducing charge build-up in an integrated circuit includes exposing the integrated circuit or portions thereof to a broadband radiation source. The process effectively reduces charge buildup that occurs in the manufacture of integrated circuits.

Process for optically erasing charge buildup during fabrication of an integrated circuit

A process for reducing roughness from a surface of a patterned photoresist. The process includes exposing a substrate having the patterned photoresist thereon to a vapor, wherein the vapor penetrates into and/or reacts with the surface of the photoresist. The substrate having the patterned photoresist thereon is then heated to a temperature and for a time sufficient to cause the surface of the photoresist to flow and/or react with the vapor wherein the surface roughness decreases. Optionally, the substrate is exposed to radiation during the process to increase the etch resistance of the photoresist and/or facilitate the reaction of the vapor with the surface of the photoresist.

Process for reducing edge roughness in patterned photoresist

A process for altering exposed and developed photoresist features. The photoresist features are exposed to at least one compound that will react with at least one of itself and at least one component of the photoresist. The reaction takes place in the presence of at least one component of the photoresist. The photoresist features are exposed to reaction-initiating energy during at least one time selected from the group consisting of prior to, simultaneous with and subsequent to exposing the photoresist features to the at least one compound.

UV assisted chemical modification of photoresist

A method of treating a dielectric material deposited on a substrate in semiconductor device manufacturing processes. The dielectric material is exposed to radiation. The dielectric material is exposed to a temperature of 20&deg; C. or greater. The dielectric material is exposed to an atmosphere that includes at least one material selected from the group consisting of an amine, an amide, at least one aldehyde, at least one aromatic compound and N .

Treatment of dielectric materials

A method of stripping a photoresist layer comprising applying a re-coating material on the photoresist layer which extends through and fills openings in a first layer on which the photoresist layer is disposed, ashing the stack comprised of the photoresist layer and the re-coating material, and removing such re-coating material as remains in the openings in the first layer after the ashing.

Method of stripping photoresist using re-coating material

A semiconductor device preparing according to a process comprising the step of photolithographic features formed in a photoresist including exposing the photoresist to at least one material selected from the group consisting of at least one amine, at least one amide, at least one aldehyde, and nitrogen.

Controlled amine poisoning for reduced shrinkage of features formed in photoresist

A process for controlled shrinkage of photolithographic features formed in photoresist. A shrinkage profile is determined for the photoresist and sizes of the photolithographic features. The photoresist is then exposed to ultraviolet radiation and elevated temperature until the photolithographic features shrink a desired amount.

Controlled shrinkage of photoresist

A process for reducing shrinkage of photolithographic features formed in a photoresist including exposing the photoresist to at least one material selected from the group consisting of at least one amine, at least one amide, at least one aldehyde, and nitrogen.

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Sykesville, MD, United States of America

Robert Douglas Mohondro