Emc Corporation

Emc IP Holding Company LLC

Robert DeCrescenzo

Steven T McClure

Adnan Sahin

Haim Kopylovitz

Michael J Scharland

Jason J Duquette

Eli Shagam

Qun Fan

James Marriott Guyer

Jerome Cartmell

James M McGillis

David Meiri

Owen Martin

Mark J Halstead

Alexandr Veprinsky

John K Walton

Kendell Alan Chilton

Dan Aharoni

Brett D Niver

Michael E Specht

Ofer Michael

Zhi-Gang Liu

Mitchell N Rosich

Michael Bermingham

Paul C Wilson

Scott B Gordon

John W Bradley

Matthew Sullivan

John Carrel

Timothy Johnson

Scott Romano

Oren Mano

William F Beckett

Timothy R Rosner

Christopher G LeClair

Steven Kosto

Waiyaki O Buliro

A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack. If the I/O request is ineligible, the I/O request may be processed via the first path on the host.

System and method for accelerated I/O access using storage array driver in Off-the-shelf server

A method, computer program product, and computer system for receiving, by a computing device, an I/O request. It may be identified whether the I/O request is eligible for handling via a first path without also requiring handling via a second path. If the I/O request is eligible, the I/O request may be processed via the first path on a host I/O stack without processing the I/O request via the second path on a storage array I/O stack. If the I/O request is ineligible, the I/O request may be processed via the first path on the host I/O stack and via the second path on the storage array I/O stack.

System and method for accelerated I/O access using storage array driver in off-the-shelf server

Techniques and mechanisms for establishing and implementing performance objectives for an application based at least in part on a workload type of the application. A system includes a storage system on which an application imposes a workload by utilizing storage resources of the storage system, and a performance level has been associated with the application. A workload type is associated with the application based on the type of workload, and a performance objective is determined for the application based on the performance level and the workload type of the application. The storage resources are manipulated to achieve the performance objective.

Application-specific workload-based I/O performance management

A method for safeguarding data stored in a memory of a data storage system includes monitoring values of a subset of environmental variables associated with the data-storage system and updating a portion of a table containing values of environmental variables associated with the data-storage system. The table includes values for environmental variables that are not in the subset of environmental variables monitored. The values of the environmental variables are then inspected. On the basis of the inspection, a condition in which there exists a high-risk of data loss is determined.

Determining environmental availability in a storage subsystem

Described are techniques for selective data replication. Cached data is replicated if it is characterized as critical. Critical data may include data associated with a write I/O operation. Cache locations are selected for replicated data so that a first location is mapped to a first memory board and a second location is mapped to a second memory board. Data for a read operation is not replicated in cache. Other non-cache data that is critical and thus replicated includes metadata. Cache locations for data of read and write I/O operations are selected dynamically at the time the I/O operation is made from the same pool of cache locations.

Method, computer readable medium, and data storage system for selective data replication of cached data

Accessing data memory includes writing data to a first memory location and to a second memory location in response to a request to write data to a memory address that corresponds to both locations, where the first and second memory locations are mirrored, in response to a request to read data from the memory address, reading data from the first memory location or the second memory location based on load balancing, and accessing data from the second memory location in response to a request to access data at the memory address when memory hardware corresponding to the first memory location has failed. Accessing the data memory may include requesting access to a specific one of the first and second memory locations. The memory address may contain a portion that is common to both the first memory location and the second memory location. Hardware coupled to the memory may cause data written using the memory address to be automatically written to the first memory location and the second memory location.

Mirrored memory

Handling a faulting memory of a pair of mirrored memories includes initially causing a non-faulting memory of the pair of mirrored memories to service all read and write operations for the pair of mirrored memories, determining that hardware corresponding to the faulting memory of the pair of mirrored memories has been successfully replaced to provide a new memory, in response to the new memory being provided, causing data to be copied from the non-faulting memory to the new memory while data is being read to and written from the non-faulting memory, and, in response to successful copying to the new memory, causing writes to be performed to both memories of the pair of mirrored memories and selecting one of the pair of mirrored memories for read operations when one or more read operations are performed. Handling a faulting memory may also include, in response to a write being performed to the non-faulting memory while data is being copied from the non-faulting memory to the new memory, causing the write to be performed to the non-faulting memory and the new memory.

Handling memory faults for mirrored memory

A common device interface for facilitating communication exchanges between physical transport drivers and higher-level software emulations. The common device interface is defined by an input/output control block (IOCB) data structure that allows those portions of different emulations and physical transport drivers that interact with each other to be generic. Thus, the emulation need not know or be concerned with the underlying characteristics of the type of physical transport driver with which it is communicating.

Common device interface

A data storage system for transferring data between a host computer/server and a bank of disk drives through a system interface. The interface includes: a global memory; a plurality of front-end directors coupled between the global memory and the host computer/server; and, a plurality of back-end directors coupled between the global memory and the bank of disk drives. Each one of the first directors and each one of the second directors has a data pipe. Each one of such front-end directors passes front-end data between the global memory and the host computer through the data pipe therein and each one of the second directors passing back-end data between the global memory and the bank of disk drives through the data pipe therein. Each one of the first and second directors includes a data pipe controller, responsive to data fed to the data pipe, for performing a selected one of a plurality of functions on the data passing through the data pipe to obtain data from the global memory or to read such data into the global memory. The function is determined by descriptors associated with the data fed to the data pipe therein. A plurality of different, independently operable state machines is provided. Each one of the state machines is adapted to produce control signals for a corresponding one to the functions. A switching section is coupled to the global memory for passing data therethrough between the global memory and the data pipe in accordance with the control signals produced by the state machines.

Data storage system

An error injection test scripting system that permits a test engineer to select from a series of commands those that will induce a desired test scenario. These commands are presented to a parser, either in command line form or as a batch of commands, which parses the syntax of the commands and associated parameters, to create a task list which is communicated to a scheduler. The scheduler handles the execution of the tasks in the list, converts parameters to explicit logical block test sequences and maintains test results. Tasks such as error injection use a special protocol (which the unit under test must be able to understand and interpret) to circumvent standard bus and controller protocols, so that test data, such as corrupt parity or multiple hard error failures can be sent to the disks in the RAID system, while bypassing the RAID array management functions that would otherwise automatically correct or prevent the errors. The scenario of injected errors to be tested is then executed through a tester, the results are evaluated and posted back to the scheduler.

Method and apparatus for testing raid systems

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Franklin, MA, United States of America

Robert DeCrescenzo