Honeywell G.m.b.h.

Robert D Girts

Larry James Yount

Randolph G Hartman

Clarence S Smith

Rick H Hay

A fail operational system including two sets of first and second sensors responsive to different stimuli to produce signals indicative of a condition, and a comparator for comparing the outputs of the first and second sensors to produce a 'valid' signal when the outputs are substantially the same.

Fail safe system with common mode avoidance

A flight critical computer system for an aircraft includes dual independent lanes having two processors in each lane. The first lane has a primary processor and a redundant processor and provides a first command signal. The second lane includes a primary processor and a redundant processor and provides a second command signal. A first monitor compares the primary processor of the first lane with the primary processor of the second lane and generates first comparison signals as a function of disagreement therebetween. A second monitor compares the output signals of the redundant processor of the second lane and the primary processor of the first lane and generates second comparison signals as a function of disagreement therebetween. A third monitor compares the primary processor of the second lane with the redundant processor of the first lane and generates third comparison signals as a function of disagreement therebetween. Selection logic selects as a function of the first, second and third comparison signals at least output generated by the processors as a command signal of the system while allowing for at least one processor to fail before both command signals from the lanes, respectively, are disabled.

Growing community of inventors

Mesa, AZ, United States of America

Robert D Girts