Maxim Integrated Products, Inc.

Robert Charles Ledzius

Matt Felder

Method and apparatus for generating a target frequency having an over-sampled data rate using a system clock having a different frequency are disclosed. In one aspect of the present disclosure, the circuit includes, a digital phase locked loop coupled to the system clock. The digital phase locked loop including an oscillator output and an oscillator input. The circuit further comprises an extra pulse eliminator coupled to the oscillator output. The extra pulse eliminator includes an extra pulse eliminator output. One or more frequency dividers may be coupled to an extra pulse eliminator output.

Method and apparatus for generating a target frequency having an over-sampled data rate using a system clock having a different frequency

A circuit for maximizing dynamic range in a digital to analog signal path comprises an input for receiving an input signal, a first gain stage coupled to the input having a first gain setting, an second gain stage coupled to the first gain stage, the second gain stage having an second gain setting, a controller configured to selectively increase the first gain setting and decrease the second gain setting according to the input signal level and an output coupled to the second gain stage for transmitting an output signal. A method for maximizing dynamic range in a digital to analog signal path comprises detecting a digital input signal level, detecting a desired user gain level, applying a first gain to the digital input signal, converting the digital input signal into an analog signal, and applying a second gain to the analog signal, wherein the first and second gain are selectively and inversely manipulated according to the digital input signal while maintaining a desired user gain level.

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Round Rock, TX, United States of America

Robert Charles Ledzius