Harris Corporation

Robert C Davis

Edwin Ray Twitchell

Robert W Boyd

Daniel D McRae

Gautam H Thaker

An adaptive apparatus for compensating the non-linear distorting action of an amplifier in a transmission system. I-channel and Q-channel memories store a plurality of digital pre-distortion correction values. The memories are addressed using a predetermined number of significant bits of an incoming, original information signal to retrieve I-channel and Q-channel pre-distortion correction values. The I-channel and Q-channel pre-distortion correction values are combined, digitally, with I-channel and Q-channel components of the original information signal to pre-distort the original information signal. The pre-distorted signal, in real format, is supplied to the amplifier, and a feed-back sample signal is coupled-off of the output of the amplifier. A comparison is made between the original information signal and the feed-back sample signal in digital format and in the complex domain (I/Q). In response to the comparison, the pre-distortion correction values (I/Q) in the memory means are modified.

Adaptive pre-distortion apparatus for linearizing an amplifier output

A digital signal processing device and method for vestigial sideband (VSB) modulation of a digital signal. A 2.sup.n -ary digital signal d.sub.i is provided to a baseband shaping filter which samples the signal to provide a baseband signal which has real and imaginary portions Re(S.sub.bb (kT)) and Im(S.sub.bb (kT)), where ##EQU1## The VSB signal is provided with perfect sideband suppression without using analog filters. The digital signal processing device and method is characterized by requiring minimal bandwidth in the shaping filter.

Device and method for digital vestigial sideband modulation

An improved narrowband continuous phase modulation system incorporates a filtering mechanism in the transmitter and receiver sites that enables the radiated spectrum characteristic to have a substantially reduced response at frequencies other than the channel of interest and thereby achieve a significant reduction in unwanted adjacent channel interference. Each of the transmitter and receiver sites contains a square root Nyquist filter upstream and downstream of the modulator and demodulator, respectively. The output of the Nyquist filter in the receiver is coupled to an accumulator which sums successive samples of the demodulated data signals (including noise). The noise is reduced as a consequence of its inherent negative correlation properties (utilized in the accumulation of successive samples of the recovered signal).

CPFSK communication system employing nyquist-filtered

A Viterbi algorithm error correcting decoder is configured of a trellis of branch-distance circuits each of which is formed of sets of diode and controlled interconnecting switches. During a respective bit time of the signal to be decoded, the branch-distance circuits are controlled so as to connect a number of diodes in each branch of the trellis proportional to the distance of the diode branch of interest to the received code branch. Due to the nonlinear voltage-current characteristic of a diode, only the path through the trellis of the branch-distance circuits having the minimum distance from the received data will draw current. Detection of this current-carrying path is used to implement the Viterbi algorithm decoder.

Diode-configured Viterbi algorithm error correcting decoder for

A non-linear equalizer corrects for intersymbol interference in a digital data transmission system by introducing baud rate samples into an N-stage tapped delay line and provision is made for storing a sequence of M prior decisions in a prior decision register. Both the samples from the tapped delay line and the contents of the prior decision register are coupled to a weighting matrix processor which is updated to permit adaptation to different channels conditions. When initially placed into operation, a training sequence is coupled to a reference register and differences between arrived-at decisions and the true symbols are employed to provide an error vector which is then used to update the weighting matrix in the processor. Decisions on the data estimates are hard-limited to form a set of M prior decisions which are placed into the prior decision register. The training sequence is employed over a suitable acquisition time so that the weights of the processor matrix will have stabilized at values suitable for the channel through which unknown digital data will be transmitted. Because the equalizer of the invention is non-linear, it can remove intersymbol interference without the severe noise enhancement problem of linear equalizers on some channels. Moreover, not only can it remove intersymbol interference from both precursors and postcursors, but it has the ability to modify previously made decisions upon the receipt of additional data from the channel.

Nonlinear equalizer for correcting intersymbol interference in a digital

Equalizers are commonly used in digital data signaling systems to reduce the effects of intersymbol interference on a signal received over a transmission channel. However, conventional equalizers are relatively slow due to their use of multipliers. Also, generally such equalizers are limited to providing a linear response to the received input signal samples. Accordingly, to provide a high-speed equalizer which is capable of both linear and nonlinear response, a transmission channel signal containing intersymbol interference is passed through a delay means which provides sequential Q-bit samples of said transmission channel signal. These Q-bit samples are then applied to a weighting means which includes a memory having stored equalizing weighting values which are accessed in accordance with the Q-bit samples to provide predetermined weighted output words in response to the Q-bit samples. These output words can be either linear or nonlinear with respect to the Q-bit samples. This technique serves to reduce intersymbol interference in the received signal thereby equalizing this signal. Also, since no multipliers are necessary, the equalizing operation can be carried out at a very high speed.

Adaptive equalizer capable of linear and nonlinear weighting

In typical error correction coding techniques for use in multilevel signalling schemes, such as M-level QAM signalling, the full data stream is encoded. In order to eliminate the need for such extensive coding while still allowing for accurate decisions as to the received data, the present system and method provide techniques for only encoding the lower significance bits of the multi-bit signal. The more significant bits are left uncoded. Accurate decisions are still possible in the majority of cases with this technique inasmuch as the most likely errors in uncoded transmission occur in deciding between adjacent received signal levels. These errors are eliminated by encoding the lower significance bits without the need for encoding the more significant bits.

Error correction coding method and apparatus for multilevel signaling

Distortion introduced into a multiamplitude signal format by a high power microwave amplifier is compensated by a system which adapts itself to non-linearities present in the amplifier and predistorts the input signals before they are subjected to the non-linearities created by the amplifier. The degree of predistortion is non-fixed and varies or is updated as the non-linear conversion characteristics of the amplifier change with time.

Adaptive predistortion technique for linearizing a power amplifier for

A coherent phase detector using a frequency discriminator for reducing a frequency encoded signal to baseband, thereby avoiding the necessity of generating a coherent RF phase reference signal. A baseband processor is provided to compensate for error components arising in the frequency discriminator output. The baseband processor includes feedback loops for DC level correction and automatic gain correction. A novel scheme is also described for reducing the influence of interbit crosstalk on the operation of the baseband processor.

Coherent phase detector using a frequency discriminator

In a convolutional code decoder, a current received input corresponds to a last data state of a received sequence. Path metrics, respective correlations of the received sequence to each of a limited number of possible sequences, are determined to choose the 'correct' possible sequence. Decoding then proceeds by known means. The current input addresses 'look-up' memories, each associated with a possible input data state and providing a 'branch metric address' output. 'Update' memories, each associated with one of the data states, are each addressed by path metrics of prior sequences which can enter its associated state and by one 'branch metric address.' In functional effect, each 'update' memory adds a separate branch metric to update each prior path metric leading into each state. Path metrics for the limited number of possible sequences are thus provided. An indication of which updated path metric is larger for each state and its value are output from each 'update' memory. The largest of the updated path metrics provided by the memories identifies the 'correct' possible sequence.

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Indialantic, FL, United States of America

Robert C Davis