International Business Machines Corporation

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Robert B Laibowitz

Thomas M Shaw

Deborah A Neumayer

Peter Richard Duncombe

Richard Joseph Gambino

Roger Hilsen Koch

Corwin Paul Umbach

Joseph Michael Viggiano

Sampath Purushothaman

Christos Dimitrios Dimitrakopoulos

John David Baniecki

Bruce Kenneth Furman

Praveen Chaudhari

Alec N Broers

Daniel C Edelstein

Tak H Ning

Katherine Lynn Saenger

Jerome J Cuomo

David Edward Kotecki

James Andrew Lacey

Robert Rosenberg

Johannes Georg Bednorz

W David Pricer

Gregory John Clark

Walter W Molzen, Jr

Jean-Pierre A Locquet

Allan David Marwick

John D Baniecki

Eugene John O'Sullivan

Kim Yang Lee

Thomas J Shaw

William Joseph Gallagher

Yun-Yu Wang

Anthony I Chou

Wesley Charles Natzle

Matthew R Wordeman

Martin Gutsche

Robert L Sandstrom

Lia Krusin-Elbaum

Christopher Carr Parks

Chienfan Yu

Hua Shen

Jenny Lian

Satish D Athavale

George A Sai-Halasz

Yuan-Chen Sun

Dieter P Kern

Edward August Giess

Eti Ganin

Aranava Gupta

Gordon J Lasher

Mark I Lutwyche

Roger Hilson Koch

Methods for forming an oxynitride dielectric in a semiconductor device are disclosed. In the method, an oxynitride layer is grown on a semiconductor device. The oxynitride layer is then annealed at a temperature of about 400&#xb0; C. for about 20 minutes. Further, the annealing may be performed in a nitrogen ambient or a nitrogen ambient including an oxygen concentration of less than about 1 to about 10 parts per billion.

Dielectrics with improved leakage characteristics

A superconducting device operable at temperatures in excess of 30&#xb0; K. and a method for making the device are described. A representative device is an essentially coplanar SQUID device formed in a single layer of high Tsuperconducting material, the SQUID device being operable at temperatures in excess of 60&#xb0; K. High energy beams, for example ion beams, are used to convert selected portions of the high Tsuperconductor to nonsuperconductive properties so that the material now has both superconductive regions and nonsuperconductive regions. In this manner a superconducting loop having superconducting weak links can be formed to comprise the SQUID device.

Method for making a superconductor device

A voltage supply bypass capacitor for use with a semiconductor integrated circuit chip or module comprising a ferroelectric dielectric having electromechanical properties designed to provide maximum losses at selected frequencies.

Tuneable ferroelectric decoupling capacitor

A method of substantially reducing and/or eliminating the amount of defects and/or impurities that amass at interfacial surfaces that are present in a multilayer structure is provided. Specifically, the method improves the efficiency of a forming gas anneal by providing a multilayer structure having a catalytic layer formed thereon or buried therein which allows for a significant increase in the amount of hydrogen or deuterium which can be incorporated into the structure. The method is also conducted at a low temperature (on the order of about 400&deg; C. or less). Multilayer structures are also provided which include an annealed multilayer structure having at least one interfacial surface present therein. The at least one material interface contains a region of hydrogen or deuterium which substantially reduces defects and impurities present at the at least one interface.

Gas treatment of thin film structures with catalytic action

An amorphous dielectric material having a dielectric constant of 10 or greater is provided herein for use in fabricating capacitors in integrated circuit applications. The amorphous dielectric material is formed using temperatures below 450&deg; C.; therefore the BEOL metallurgy is not adversely affected. The amorphous dielectric material of the present invention exhibits good conformality and a low leakage current. Damascene devices containing the capacitor of the present invention are also disclosed.

BEOL decoupling capacitor

In a Field Effect Transistor (FET) with a semiconductor channel the use of a high T oxide superconductor material in the gate electrode provides both control of parasitic resistance and capacitance and a proper work function when operated at a temperature below the T . The 1-2-3 compound oxide superconductors with the general formula Y Ba Cu O where y is approximately 0.1 have the ability in use in FET's to provide convenient work functions, low resistance and capacitance, and to withstand temperatures encountered in processing as the FET is being manufactured.

Superconductor gate semiconductor channel field effect transistor

A method for tailoring properties of high k thin layer perovskite materials, and devices comprising such insulators are herein presented. The method comprise the steps of, first, substantially completing the manufacture of a device, which device contains the high k insulator in a polycrystalline form. The device, such as a capacitor, or an FET, went through the typically high temperature manufacturing process of a fabrication line. In the next step, the device is in situ ion implanted with such a dose and energy to convert a fraction of the polycrystalline material into an amorphous material state, hereby tailoring the properties of the insulator. The fraction of polycrystalline material converted to amorphous material might be 1. This process can be applied to many electronic devices and some optical devices. The process results in novel perovskite thin layer materials and novel devices fabricated with such materials.

Tailored insulator properties for devices

A method for configuring a bypass capacitor for use in conjunction with an integrated circuit device is disclosed. In an exemplary embodiment of the invention, the method includes selecting mechanical dimensions for the bypass capacitor, the mechanical dimensions causing the bypass capacitor to exhibit electrical losses at a clock frequency of the integrated circuit device. The bypass capacitor preferably includes a ferroelectric dielectric material. In addition, the selection of mechanical dimensions for the bypass capacitor determines a mechanical resonance frequency for the bypass capacitor, with the mechanical resonance frequency corresponding to the clock frequency.

A thin film transistor (TFT) device structure based on an organic semiconductor material, that exhibits a high field effect mobility, high current modulation and a low sub-threshold slope at lower operating voltages than the current state of the art organic TFT devices. The structure comprises a suitable substrate disposed with he following sequence of features: a set of conducting gate electrodes covered with a high dielectric constant insulator, a layer of the organic semiconductor, sets of electrically conducting source and drain electrodes corresponding to each of the gate lines, and an optional passivation layer that can overcoat and protect the device structure. Use of high dielectric constant gate insulators exploits the unexpected gate voltage dependence of the organic semiconductor to achieve high field effect mobility levels at very low operating voltages. Judicious combinations of the choice of this insulator material and the means to integrate it into the TFT structure are taught that would enable easy fabrication on glass or plastic substrates and the use of such devices in flat panel display applications.

Thin-film field-effect transistor with organic semiconductor requiring low operating voltages

A structure and method for providing an interface with an oxide surface which exhibits both high adhesion and preferred electrical properties. The method involves providing a partial layer of a first material, chosen for its electrical properties, whereby the partial layer has openings through which areas of the oxide surface are exposed. Provision of the partial layer is followed by deposition of a continuous layer of a second material, selected for its preferred physical interface properties, i.e., adhesion. The continuous layer of the second material is deposited over the partial layer including the exposed areas of the oxide surface. The second material will adhere to the exposed areas of oxide, while the first material will provide a discrete interface with the oxide. An embodiment includes a capacitor structure having one or two electrodes abutting a high dielectric thin film, whereby the electrodes comprise first partial layers of metal having favorable electrical properties and second continuous layers adjacent the first partial layers, with the second layer material having been chosen for its physical properties, and wherein the second material adheres to exposed areas of the thin film through openings in the partial metal layer.

Method for fabricating a novel metallized oxide structure

High-capacity capacitors and gate insulators exhibiting moderately high dielectric constants with surprisingly low leakage using amorphous or low temperature films of perovskite type oxides including a titanate system material such as barium titanate, strontium titanate, barium strontium titanate (BST), lead titanate, lead zirconate titanate, lead lanthanum zirconate titanate, barium lanthanum titanate, a niobate, aluminate or tantalate system material such as lead magnesium niobate, lithium niobate lithium tantalate, potassium niobate and potassium tantalum niobate, a tungsten-bronze system material such as barium strontium niobate, lead barium niobate, barium titanium niobate, and Bi-layered perovskite system material such as strontium bismuth tantalate, bismuth titanate deposited directly on a silicon surface at temperatures about 450&deg; C. or less.

Amorphous dielectric capacitors on silicon

A capacitor and method of making is described incorporating a semiconductor substrate, a bottom electrode formed on or in the substrate, a dielectric layer of barium or lead silicate, and a top electrode. A sandwich dielectric of a barium or lead silicate and a high dielectric constant material such as barium or lead titanate may form the dielectric. The silicate layer may be formed by evaporating and diffusing, ion implanting, or electroplating and diffusing barium or lead. The high epsilon dielectric constant material may be formed by sol gel deposition, metal organic chemical vapor deposition or sputtering. The invention overcomes the problem of a bottom electrode and dielectric layer which chemically interact to form a silicon oxide layer in series or below the desired dielectric layer.

Lead silicate based capacitor structures

A method for forming a dielectric layer includes exposing a surface to a first dielectric material in gaseous form at a first temperature. Nuclei of the first dielectric material are formed on the surface. A layer of a second dielectric material is deposited on the surface by employing the nuclei as seeds for layer growth wherein the depositing is performed at a second temperature which is greater than the first temperature.

High dielectric constant material deposition to achieve high capacitance

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Peekskill, NY, United States of America

Robert B Laibowitz