Advanced Micro Devices Corporation

Mitsubishi Materials Corporation

Gtat Corporation

Twin Creeks Technologies, Inc.

Robert B Clark-Phelps

Huicai Zhong

Theodore H Smick

Joong Jeon

Takao Sakase

Gopal Prabhu

Joseph Daniel Gillespie

Steve Bababyan

Adam Kell

Steve Zuniga

Qi Xiang

Mark T Ramsbey

Arvind Halliyal

Robert B Ogle

George Jonathan Kluth

Wenmei Li

Kuo Tung Chang

A method for producing a lamina from a donor body includes implanting the donor body with an ion dosage and separably contacting the donor body with a susceptor assembly, where the donor body and the susceptor assembly are in direct contact. A lamina is exfoliated from the donor body, and a deforming force is applied to the lamina or to the donor body to separate the lamina from the donor body.

Method and apparatus for forming a thin lamina

A method for producing a lamina from a donor body includes implanting the donor body with an ion dosage and heating the donor body to an implant temperature during implanting. The donor body is separably contacted with a susceptor assembly, where the donor body and the susceptor assembly are in direct contact. A lamina is exfoliated from the donor body by applying a thermal profile to the donor body. Implantation and exfoliation conditions may be adjusted in order to maximize the defect-free area of the lamina.

According to one exemplary embodiment, a method for forming a field-effect transistor on a substrate comprises a step of forming a buffer layer on the substrate, where the buffer layer comprises ALD silicon dioxide. The buffer layer can be formed by utilizing a silicon tetrachloride precursor in an atomic layer deposition process, for example. The buffer layer comprises substantially no pin-hole defects and may have a thickness, for example, that is less than approximately 5.0 Angstroms. The method further comprises forming a high-k dielectric layer over the buffer layer. The high-k dielectric layer may be, for example, hafnium oxide, zirconium oxide, or aluminum oxide. According to this exemplary embodiment, the method further comprises forming a gate electrode layer over the high-k dielectric layer. The gate electrode layer may be polycrystalline silicon, for example.

Method for forming a thin, high quality buffer layer in a field effect transistor and related structure

According to one embodiment, a memory cell structure comprises a semiconductor substrate, a first silicon oxide layer situated over the semiconductor substrate, a charge storing layer situated over the first silicon oxide layer, a second silicon oxide layer situated over the charge storing layer, and a gate layer situated over the second silicon oxide layer. In the exemplary embodiment, the charge storing layer comprises silicon nitride having reduced hydrogen content, e.g., in the range of about 0 to 0.5 atomic percent. As a result, the reduced hydrogen content reduces the charge loss in the charge storing layer. The reduced charge loss in the charge storing layer has the benefit of reducing threshold voltage shifts, programming data loss, and programming capability loss in the memory device, thereby improving memory device performance.

Memory cell structure having nitride layer with reduced charge loss and method for fabricating same

A method and system for detecting a planarization endpoint of a semiconductor wafer planarization operation, which includes monitoring a motor current for at least one of a platen motor, a carousel motor and a head motor, performing a Fourier transform of the monitored current to identify periodic oscillations in the current, to ensure that undesirable oscillations in the monitored motor current are minimized, to provide better reliability and higher precision of end-point detection triggering.

System and method for end-point detection in a multi-head CMP tool using real-time monitoring of motor current

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San Jose, CA, United States of America

Robert B Clark-Phelps