International Business Machines Corporation

Globalfoundries Inc.

Globalfoundries U.S. 2 LLC

Robert Allen Groves

Richard Paul Volant

Jennifer L Lund

Anthony K Stamper

Venkata Nr Vanukuru

Kevin Shawn Petrarca

Kenneth Jay Stein

Seshadri Subbanna

Robert L Barry

Hariklia Deligianni

Christopher Vincent Jahnes

Mete Erturk

Venkata N R Vanukuru

Raul E Acosta

Jason D Hibbeler

Steven Alan Cordes

William Robert Reohr

Phillip John Restle

Anil Kumar Chinthakindi

Alan J Drake

Liang-Teck Pang

Joanna Rosner

Thomas J Bucelot

Dale K Jadus

Yong I Kim

Michael G R Thomson

Melanie L Carasso

Arne Watson Ballantine

Ping-Chuan Wang

Zhong-Xiang He

Jeffrey Bowman Johnson

Christopher Stephen Putnam

Ning Lu

Panayotis Constantinou Andricacos

David Earle Seeger

Eric Thompson

Michael B Rice

Keith M Walter

L Paivikki Buchwalter

Dominique L Nguyen-Ngoc

Qizhi Liu

Timothy Joseph Dalton

Timothy Dooling Sullivan

Alvin Jose Joseph

Hanyi Ding

Edmund Juris Sprogis

James Spiros Nakos

Peter James Lindgren

Jae-Eun Park

Kunal Vaed

Donna Rizzone Cote

Michael Meixner

Youri V Tretiakov

Sarath L K Parambil

John C Bisson

Lawrence Alfred Clevenger

Takashi Ando

Daniel C Edelstein

Hemanth Jagannathan

Katherine Lynn Saenger

Douglas Duane Coolbaugh

Peter Alfred Gruber

Robert Mark Rassel

John Michael Cotte

Griselda Bonilla

Joel Abraham Silberman

Joshua M Rubin

George Frederick Walker

Wagdi William Abadeer

Gregory Gower Freeman

Stephen Arthur St Onge

Thomas J Fleischman

David S Collins

David R Greenberg

John Chester Malinowski

Patrick R Hansen

Charles J Montrose

Robert Daniel Edwards

John Edward Florkey

Edward Jack Gordon

Brian Wayne Herbst

Jiansheng Xu

David M Rockwell

Wan Ni

Arvind Narayanan

Philippe P D Girard

Srikumar Konduru

John E Florkey

Joanna c/o Ibm United Kingdom Limited Rosner

Melanie Carasso

Jennifer c/o Ibm Uk Ltd Lund

Raul Acosta

Electrical structures, methods, and computer program products for radio frequency (RF) de-embedding are provided. A structure includes a first test device, a first through structure corresponding to the first test device, and a first open structure corresponding to the first test device. The structure also includes a second test device having at least one different physical dimension than the first test device but otherwise identical to the first test device, a second through structure corresponding to the second test device, and a second open structure corresponding to the second test device. A method includes determining a first electrical parameter of the first test device in a first DUT structure and a second electrical parameter of the second test device in a second DUT structure based on measured electrical parameters of the first and the second DUT structures, through structures, and open structures.

Structures and methods for RF de-embedding

An integrated circuit transformer structure includes at least two conductor groups stacked in parallel in different layers. A first spiral track is formed in the at least two conductor groups, the first spiral track included first turns of a first radius within each of the at least two conductor groups, and second turns of a second radius within each of the at least two conductor groups, the first and second turns being electrically connected. A second spiral track is formed in the at least two conductor groups, the second spiral track including third turns of a third radius within each of the at least two conductor groups and disposed in a same plane between the first and second turns in each of the at least two conductor groups.

High efficiency on-chip 3D transformer structure

A method is presented for forming a stacked metal-insular-metal (MIM) capacitor with self-aligned contact. The method includes forming a first electrode plate over a first interlayer dielectric (ILD), forming a first spacer adjacent the first electrode plate, forming a first insulating layer over the first electrode plate, forming a second electrode plate over the first insulating layer, and forming a second spacer adjacent the second electrode plate and the first insulating layer. The method further includes forming a second insulating layer over the second electrode plate, forming a third electrode plate over the second insulating layer, forming a third spacer adjacent the third electrode plate and the second insulating layer, and forming a second ILD over the third electrode plate. The method also includes forming a first via through the second ILD and directly contacting the second spacer such to prevent the first via from contacting the second electrode plate.

Stacked MIM capacitors with self-aligned contact to reduce via enclosure

Devices and methods are provided for fabricating a metal-insulator-metal capacitor within an interconnect structure (e.g., back-end-of-line interconnect structure) to provide capacitive decoupling between positive and negative power supply voltage lines of a power distribution network. Various via contact configurations including interlevel via contacts and truncated via contacts are utilized to connect the metal-insulator-metal capacitor electrodes to power supply voltage lines of the power distribution network to provide an array of high-density, low resistance via contact connections at various locations across the capacitor electrodes to reduce the resistance of the metal-insulator-metal capacitor and, thus, enhance the transient response time and increase the cutoff frequency of the metal-insulator-metal capacitor. The truncated via contacts allow for higher density via contact connections to the capacitor electrodes in regions which have a dense array of wiring of a single polarity, where interlevel via contacts cannot be utilized to provide contacts to the capacitor electrodes.

High cutoff frequency metal-insulator-metal capacitors implemented using via contact configurations

Fabrication methods for a 3D multipath inductor, including forming a metal layer to form spiral turns about a center region, the spiral turns including segments that extend length-wise along the turns and having positions that vary from an innermost position and an outermost position relative to the center region; forming a lateral cross-over configured to couple portions of lateral segments in different relative positions from the center region to form lateral segment paths that have a substantially same length for all lateral segment paths in a grouping thereof; forming an additional metal layer to form spiral turns about the center region including corresponding geometry to the first metal layer; and forming a vertical cross-over configured to couple portions of segments on different metal layers to form vertical segment paths that have a substantially same length for all vertical segment paths in a grouping thereof.

Manufacturing method for 3D multipath inductor

A series stacked, solenoidally wound, multipath inductor includes a plurality of turns disposed about a center region on two layers. The turns on the two layers have corresponding geometry therebetween. Each of the plurality of turns includes two or more segments that extend length-wise along the turns. The segments have positions that vary from an innermost position relative to the center region and an outermost position relative to the center region. A cross-over architecture is configured to couple the segments of a turn on one layer with the segments on a turn on another layer to form segment paths that have a substantially same length for all segment paths in a segment path grouping between the two layers.

Solenoidal series stacked multipath inductor

A wide bandwidth resonant clock distribution comprises a clock grid configured to distribute a clock signal to a plurality of components of an integrated circuit and a tunable sector buffer configured to receive the clock signal and provide an output to the clock grid. The tunable sector buffer is configured to set latency and slew rate of the clock signal based on an identified resonant or non-resonant mode.

Tunable sector buffer for wide bandwidth resonant global clock distribution

A parallel stacked multipath inductor includes a first layer including turns disposed about a center region, the turns on the first layer having segments that extend length-wise along the turns, the segments having positions that vary from an innermost position relative to the center region and an outermost position relative to the center region. A second layer includes turns electrically connected to the first layer along its length and disposed about the center region, the turns on the second layer having segments that extend length-wise along the turns, the segments having positions that vary from an innermost position and an outermost position relative to the center region. Cross-over architectures are configured to couple the segments on the first layer with the segments on the second layer to form segment paths that have a substantially same length for all segment paths per turn between the first and second layers.

High-Q multipath parallel stacked inductor

A three-dimensional multipath inductor includes turns disposed about a center region on two layers, the turns on the two layers having corresponding geometry therebetween. Each of the turns is comprised of two or more segments that extend length-wise along the turns, and the segments have positions that vary from an innermost position relative to the center region and an outermost position relative to the center region. A lateral cross-over is configured to couple the segments of at least one turn on one layer with the segments on a turn on a same layer to form segment paths that have a substantially same length for all segment paths in a grouping of segment paths on that same layer. A vertical cross-over is configured to couple the segments on different vertically stacked metal layers to have the segment groups with a substantially same length for all segment paths based on vertical lengths.

3D multipath inductor

A semiconductor inductor structure may include a first spiral structure, located on a first metal layer, having a first outer-spiral electrically conductive track and a first inner-spiral electrically conductive track separated from the first outer-spiral electrically conductive track by a first dielectric material. A second spiral structure, located on a second metal layer, having a second outer-spiral electrically conductive track and a second inner-spiral electrically conductive track separated from the second outer-spiral electrically conductive track by a second dielectric material may also be provided. The first outer-spiral electrically conductive track may be electrically coupled to the second outer-spiral electrically conductive track and the first inner-spiral electrically conductive track may be electrically coupled to the second inner-spiral electrically conductive track. The first outer-spiral conductive track is laterally offset relative to the second outer-spiral conductive track and the first inner-spiral conductive track is laterally offset relative to the second inner-spiral conductive track.

Folded conical inductor

An integrated circuit transformer structure includes at least two conductor groups stacked in parallel in different layers. A first spiral track is formed in the at least two conductor groups, the first spiral track includes first turns of a first radius within each of the at least two conductor groups, and second turns of a second radius within each of the at least two conductor groups, the first and second turns being electrically connected. A second spiral track is formed in the at least two conductor groups, the second spiral track including a plurality of adjacent turns of one or more radii within each of the at least two conductor groups and disposed in a same plane between the first and second turns in each of the at least two conductor groups.

Disclosed is an inductor structure. The inductor structure includes a base material, a plurality of bottom spiral conductors disposed on the base material, and at least one top spiral conductor disposed on the at least one bottom spiral conductor, and dielectric material separating the bottom, middle and top spiral conductors. A current path for high frequency operation is disclosed. Also disclosed is a method for determining the number of turns in the at least one top spiral conductor and the at least one bottom spiral conductor.

High frequency inductor structure having increased inductance density and quality factor

Growing community of inventors

Highland, NY, United States of America

Robert Allen Groves