Lucent Technologies Inc.

Agere Systems Inc.

American Telephone and Telegraph, Co.

Agere System Optoelectronics Guardian Corp.

Robert Alan Hamm

Rose Fasano Kopf

Robert William Ryan

Alaric Tate

Jinwook Burm

Utpal Kumar Chakrabarti

Roger J Malik

Naresh Chand

Morton B Panish

Lawrence Edwin Smith

Gleb E Shtengel

Christopher James Pinzone

Yu-Chi Wang

Joseph Brian Seiler

John F Walker

A method of fabricating a III-V heterostructure semiconductor device. The method includes the steps of forming at least one conductive post overlying a semiconductor region to form a structure, encapsulating the structure and the conductive post to form a planarized cured passivation layer, and exposing the conductive post through the planarized cured passivation layer to form the semiconductor device.

Method of fabricating a heterojunction bipolar transistor

The invention is an optical device and method of fabrication which mitigates the problem of Zn migration in the cladding and waveguide regions. The contact region includes carbon, which acts as a p-type dopant in ternary semiconductor material. The contact layer is made of InGaAs or InGaAsP, and the invention is most advantageously used in an electroabsorption modulated laser or capped mesa buried heterostructure laser.

Optical device including carbon-doped contact layers

The specification describes a lithographic technique in which alignment marks are defined in a first semiconductor layer and the alignment marks are then covered with a protective SiO,layer. After subsequent semiconductor layer growth steps, which selectively deposit on the former semiconductor layer but not on the protective layer, the alignment marks remain undistorted and visible to the exposure tool for subsequent processing.

Alignment techniques for epitaxial growth processes

The specification describes a metal contact material optimized for diffused contacts to the buried emitter-base junction in DHBT devices. The metal contact material is a multilayer structure of Pd--Pt--Au which gives the required critical diffusion properties for low resistance contacts to the buried base layer without shorting to the collector layer.

Method for making InP heterostructure devices

The specification describes a trilevel resist technique for defining metallization patterns by lift-off. The trilevel resist comprises two standard photoresist levels separated by a thin silicon oxide layer with approximate composition SiO.sub.2.

Trilayer lift-off process for semiconductor device metallization

The specification describes a photolithography process using multiple exposures to form z-dimension patterns. Multiple exposures at different thickness levels are made using photomasks aligned with a latent image of alignment marks formed during the first exposure. The latent image is visible to the alignment system of commercial steppers.

Method of manufacturing schottky gate transistor utilizing alignment

Alignment techniques for photolithography utilizing multiple photoresist

The specification describes a technique for repairing wafer fractures that occur during wafer fabrication. The fractured pieces are joined edge-to-edge at the fracture line and bonded with epoxy adhesive. The method succeeds because the dimensions of the fracture line after bonding is within the reregistration tolerance of commercial step-and-repeat cameras and the reregistration capability of the camera allows normal exposure of sites that do not intersect the fracture line.

Repairing fractured wafers in semiconductor manufacturing

The specification describes a metal contact material optimized for diffused contacts to the buried emitter-base junction in DHBT devices. The metal contact material is a multilayer structure of Pd-Pt-Au which gives the required critical diffusion properties for low resistance contacts to the buried base layer without shorting to the collector layer.

INP heterostructure devices

The specification describes techniques for cleaving crystal bodies, e.g. semiconductor laser bars, using thermostatic cleaving tools. Use of such tools allows the cleaving process to occur in an ultra high vacuum chamber without the use of mechanical devices activated from the exterior of the chamber. Cleaving occurs automatically and controllably by locally heating the cleaving tools, thereby deflecting the thermostatic element against the laser bar and causing fracture.

In-situ technique for cleaving crystals

36 We have discovered the III-V semiconductor layers with previously unattainably high effective hole concentrations can be produced by molecular growth processes (e.g. MBE) if an amphoteric dopant such as Be is used and if, during the growth of the highly doped III-V layer, the substrate is maintained at a temperature T.sub.g that is substantially lower than customarily used. For instance, a InGaAs layer with effective hole concentration 1.0.times.10.sup.20 cm.sup.-3 was grown at T.sub.g =450.degree. C., and a GaAs layer with effective hole concentration of 1.0.times.10.sup.20 cm.sup.-3 was grown at T.sub.g of 475.degree. C. The heavily doped III-V layers can be of device grade and can usefully be part of electronic devices such as high speed bipolar transistors.

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Staten Island, NY, United States of America

Robert Alan Hamm